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器件3D模型￥ 14.608
TMS320F28027PTR 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
LQFP-48
描述:
TEXAS INSTRUMENTS TMS320F28027PTR 芯片, MCU, 32位, 64KB, 闪存, 48LQFP
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9P71Hot
典型应用电路图在P44P87
原理图在P3P84P89P98P108
封装尺寸在P134P135P136
标记信息在P134P135P136P137
封装信息在P1P2P130P134P135P136P137
技术参数、封装参数在P16P17P18P19P20P21P22P23P24P25P26P27
应用领域在P1P63P107P123P138
电气规格在P23P41P60P76P85
导航目录
TMS320F28027PTR数据手册
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3 External Interrupts
16-Bit Peripheral Bus
SCI
(4L FIFO)
ePWM
SPI
(4L FIFO)
I2C
(4L FIFO)
HRPWM
eCAP
32-Bit Peripheral Bus
Code
Security
Module
GPIO MUX
C28x
32-Bit CPU
A7:0
B7:0
PIE
CPU Timer 0
CPU Timer 1
CPU Timer 2
TCK
TDI
TMS
TDO
TRST
OSC1,
OSC2,
Ext,
PLL,
LPM,
WD
XCLKIN
X2
XRS
32-Bit Peripheral Bus
ECA Px
EPWMxA
EPWMSYNCI
SDAx
SPISTEx
SCLx
SPISIMOx
SPICLKx
COMP1OUT
SCIRXDx
GPIO
Mux
LPM Wakeup
AIO
MUX
ADC
PSWD
FLASH
8K/16K/32K × 16
Secure
OTP 1K × 16
Secure
OTP/Flash
Wrapper
M0
SARAM 1K × 16
(0-wait)
M1
SARAM 1K × 16
(0-wait)
Boot-ROM
8K × 16
(0-wait)
SARAM
1K/3K/4K × 16
(0-wait)
Secure
COMP
COMP1A
COMP1B
COMP2A
COMP2B
COMP2OUT
X1
GPIO
MUX
VREG
From
COMP1OUT,
COMP2OUT
POR/
BOR
Memory Bus
Memory Bus
Memory Bus
TZx
SCITXDx
SPISOMIx
EPWMxB
EPWMSYNCO
Copyright © 2016, Texas Instruments Incorporated
32-Bit Peripheral Bus
3
TMS320F28027
,
TMS320F28026
,
TMS320F28023
,
TMS320F28022
TMS320F28021
,
TMS320F28020
,
TMS320F280200
www.ti.com
SPRS523K –NOVEMBER 2008–REVISED JUNE 2016
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Product Folder Links: TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021
TMS320F28020 TMS320F280200
Device OverviewCopyright © 2008–2016, Texas Instruments Incorporated
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram for the device.
A. Not all peripheral pins are available at the same time due to multiplexing.
Figure 1-1. Functional Block Diagram
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