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TMS320F28379SPTPS 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
QFP
描述:
具有 400MIPS、1xCPU、1xCLA、FPU、TMU、512KB 闪存、CLB、EMIF、16 位 ADC 的 C2000™ 32 位 MCU 176-HLQFP -40 to 125
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TMS320F28379SPTPS数据手册
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TMS320F28379S
,
TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881B –AUGUST 2014–REVISED OCTOBER 2015
TMS320F2837xS Delfino™ Microcontrollers
1 Device Overview
1.1 Features
1
– Four Serial Communications Interfaces
• TMS320C28x 32-Bit CPU
(SCI/UART) (Pin-Bootable)
– 200 MHz
– Two I
2
C Interfaces (Pin-Bootable)
– IEEE 754 Single-Precision Floating-Point Unit
• Analog Subsystem
(FPU)
– Up to Four Analog-to-Digital Converters (ADCs)
– Trigonometric Math Unit (TMU)
• 16-Bit Mode
– Viterbi/Complex Math Unit (VCU-II)
– 1.1 MSPS Each (up to 4.4-MSPS System
• Programmable Control Law Accelerator (CLA)
Throughput)
– 200 MHz
– Differential Inputs
– IEEE 754 Single-Precision Floating-Point
– Up to 12 External Channels
Instructions
• 12-Bit Mode
– Executes Code Independently of Main CPU
– 3.5 MSPS Each (up to 14-MSPS System
• On-Chip Memory
Throughput)
– 512KB (256KW) or 1MB (512KW) of Flash
– Single-Ended Inputs
(ECC-Protected)
– Up to 24 External Channels
– 132KB (66KW) or 164KB (82KW) of RAM
(ECC-Protected or Parity-Protected)
• Single Sample-and-Hold (S/H) on Each ADC
– Dual-Zone Security Supporting Third-Party
• HW Integrated Post-Processing of ADC
Development
Conversions
• Clock and System Control
– Saturating Offset Calibration
– Two Internal Zero-Pin 10-MHz Oscillators
– Error From Setpoint Calculation
– On-Chip Crystal Oscillator
– High, Low, and Zero-Crossing Compare,
With Interrupt Capability
– Windowed Watchdog Timer Module
– Trigger-to-Sample Delay Capture
– Missing Clock Detection Circuitry
– Eight Windowed Comparators With 12-Bit
• 1.2-V Core, 3.3-V I/O Design
Digital-to-Analog Converter (DAC) References
• System Peripherals
– Three 12-Bit Buffered DAC Outputs
– Two External Memory Interfaces (EMIFs) With
• Enhanced Control Peripherals
ASRAM and SDRAM Support
– 24 PWM Channels With Enhanced Features
– 6-Channel Direct Memory Access (DMA)
– 16 High-Resolution Pulse Width Modulator
– Up to 169 Individually Programmable,
(HRPWM) Channels
Multiplexed General-Purpose Input/Output
(GPIO) Pins With Input Filtering
• High Resolution on Both A and B Channels
of 8 PWM Modules
– Peripheral Interrupt Controller (ePIE)
• Dead-Band Support (on Both Standard and
– Multiple Low-Power Mode (LPM) Support With
High Resolution)
External Wakeup
– Six Enhanced Capture (eCAP) Modules
• Communications Peripherals
– Three Enhanced Quadrature Encoder Pulse
– USB 2.0 (MAC + PHY)
(eQEP) Modules
– Support for 12-Pin 3.3 V-Compatible Universal
– Eight Sigma-Delta Filter Module (SDFM) Input
Parallel Port (uPP) Interface
Channels, 2 Parallel Filters per Channel
– Two Controller Area Network (CAN) Modules
(Pin-Bootable) • Standard SDFM Data Filtering
– Three High-Speed (up to 50-MHz) SPI Ports
• Comparator Filter for Fast Action for Out of
(Pin-Bootable)
Range
– Two Multichannel Buffered Serial Ports
(McBSPs)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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