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ATMEGA16A-AU 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-44
描述:
ATmega 系列 16 MHz 16 KB 闪存 1 KB SRAM 8 位 微控制器 - TQFP-44
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P6P51Hot
原理图在P4P8P49P69P70P71P73P86P91P92P94P95
封装尺寸在P325P326P327
型号编码规则在P324
封装信息在P325
应用领域在P36P44P47P237P241P249P251P252P335
电气规格在P49P66
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ATMEGA16A-AU数据手册
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6
ATmega16A [DATASHEET]
Atmel-8154C-8-bit-AVR-ATmega16A_Datasheet-07/2014
2.2 Pin Descriptions
2.2.1 VCC
Digital supply voltage.
2.2.2 GND
Ground.
2.2.3 Port A (PA7:PA0)
Port A serves as the analog inputs to the A/D Converter.
Port A also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide
internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics
with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are externally pulled
low, they will source current if the internal pull-up resistors are activated. The Port A pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
2.2.4 Port B (PB7:PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the ATmega16A as listed on page 57.
2.2.5 Port C (PC7:PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-
stated when a reset condition becomes active, even if the clock is not running. If the JTAG interface is enabled,
the pull-up resistors on pins PC5(TDI), PC3(TMS) and PC2(TCK) will be activated even if a reset occurs.
Port C also serves the functions of the JTAG interface and other special features of the ATmega16A as listed on
page 59.
2.2.6 Port D (PD7:PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATmega16A as listed on page 62.
2.2.7 RESET
Reset Input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the
clock is not running. The minimum pulse length is given in Table 27-2 on page 282. Shorter pulses are not
guaranteed to generate a reset.
2.2.8 XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
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