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ATMEGA329PV-10MU 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
QFN-64
描述:
ATmega 系列 32 KB 闪存 2 KB SRAM 10 MHz 8位 微控制器 - MLF/QFN-64
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ATMEGA329PV-10MU数据手册
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4
8021GS–AVR–03/11
ATmega329P/3290P
2. Overview
The ATmega329P/3290P is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega329P/3290P achieves throughputs approaching 1MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
The Atmel
®
AVR
®
core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two inde-
pendent registers to be accessed in one single instruction executed in one clock cycle. The
PROGRAM
COUNTER
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
STACK
POINTER
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
GENERAL
PURPOSE
REGISTERS
INSTRUCTION
REGISTER
TIMER/
COUNTERS
INSTRUCTION
DECODER
DATA DIR.
REG. PORTB
DATA DIR.
REG. PORTE
DATA DIR.
REG. PORTA
DATA DIR.
REG. PORTD
DATA REGISTER
PORTB
DATA REGISTER
PORTE
DATA REGISTER
PORTA
DATA REGISTER
PORTD
TIMING AND
CONTROL
OSCILLATOR
INTERRUPT
UNIT
EEPROM
SPI
USART
STATUS
REGISTER
Z
Y
X
ALU
PORTB DRIVERS
PORTE DRIVERS
PORTA DRIVERS
PORTF DRIVERS
PORTD DRIVERS
PORTC DRIVERS
PB0 - PB7PE0 - PE7
PA0 - PA7PF0 - PF7
VCCGND
XTAL1
XTAL2
CONTROL
LINES
+
-
ANALOG
COMPARATOR
PC0 - PC7
8-BIT DATA BUS
RESET
CALIB. OSC
DATA DIR.
REG. PORTC
DATA REGISTER
PORTC
ON-CHIP DEBUG
JTAG TAP
PROGRAMMING
LOGIC
BOUNDARY-
SCAN
DATA DIR.
REG. PORTF
DATA REGISTER
PORTF
ADC
PD0 - PD7
DATA DIR.
REG. PORTG
DATA REG.
PORTG
PORTG DRIVERS
PG0 - PG4
AGND
AREF
AVCC
UNIVERSAL
SERIAL INTERFACE
AVR CPU
LCD
CONTROLLER/
DRIVER
PORTH DRIVERS
PH0 - PH7
DATA DIR.
REG. PORTH
DATA REGISTER
PORTH
PORTJ DRIVERS
PJ0 - PJ6
DATA DIR.
REG. PORTJ
DATA REGISTER
PORTJ
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