Datasheet 搜索 > 8位微控制器 > Microchip（微芯） > ATMEGA64A-MU 数据手册 > ATMEGA64A-MU 用户编程技术手册 1/505 页
器件3D模型￥ 39.892
ATMEGA64A-MU 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
8位微控制器
封装:
QFN-64
描述:
8位微控制器 -MCU 64K Flsh 2K EEPROM 4K SRAM 16MHz
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P14P35P94P137P138P192P215P235P238P246P306Hot
原理图在P12P22P92P138P143P144P146P148P192P194P195P196
封装尺寸在P500P501
型号编码规则在P11
封装信息在P11P500
技术参数、封装参数在P415P433
应用领域在P39P40P67P78P83P366P370P383P384P505
电气规格在P85P92P93P415P433
导航目录
ATMEGA64A-MU数据手册
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若手册格式错乱，请下载阅览PDF原文件
ATmega64A
ATmega64A
DATASHEET COMPLETE
Introduction
The Atmel
®
ATmega64A is a low-power CMOS 8-bit microcontroller based
on the AVR
®
enhanced RISC architecture. By executing powerful instructions
in a single clock cycle, the ATmega64A achieves throughputs close to
1MIPS per MHz. This empowers system designer to optimize the device for
power consumption versus processing speed.
Features
• High-performance, Low-power Atmel AVR 8-bit Microcontroller
• Advanced RISC Architecture
– 130 Powerful Instructions - Most Single-clock Cycle Execution
– 32 × 8 General Purpose Working Registers + Peripheral Control
Registers
– Fully Static Operation
– Up to 16MIPS Throughput at 16MHz
– On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
– 64Kbytes of In-System Self-programmable Flash program
memory
– 2Kbytes EEPROM
– 4Kbytes Internal SRAM
– Write/Erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
(1)
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Up to 64 Kbytes Optional External Memory Space
– Programming Lock for Software Security
– SPI Interface for In-System Programming
• JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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