Datasheet 搜索 > 微控制器 > ATMEL（爱特美尔） > ATTINY24A-MU 数据手册 > ATTINY24A-MU 用户编程技术手册 5/22 页
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ATTINY24A-MU 用户编程技术手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
微控制器
封装:
QFN-20
描述:
ATMEL ATTINY24A-MU 微控制器, 8位, 低功率高性能, ATtiny, 20 MHz, 2 KB, 128 Byte, 20 引脚, QFN
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ATTINY24A-MU数据手册
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5
8183FS–AVR–06/12
ATtiny24A/44A/84A
The ATtiny24A/44A/84A provides the following features: 2K/4K/8K byte of In-System Program-
mable Flash, 128/256/512 bytes EEPROM, 128/256/512 bytes SRAM, 12 general purpose I/O
lines, 32 general purpose working registers, an 8-bit Timer/Counter with two PWM channels, a
16-bit timer/counter with two PWM channels, Internal and External Interrupts, a 8-channel 10-bit
ADC, programmable gain stage (1x, 20x) for 12 differential ADC channel pairs, a programmable
Watchdog Timer with internal oscillator, internal calibrated oscillator, and four software select-
able power saving modes. Idle mode stops the CPU while allowing the SRAM, Timer/Counter,
ADC, Analog Comparator, and Interrupt system to continue functioning. ADC Noise Reduction
mode minimizes switching noise during ADC conversions by stopping the CPU and all I/O mod-
ules except the ADC. In Power-down mode registers keep their contents and all chip functions
are disbaled until the next interrupt or hardware reset. In Standby mode, the crystal/resonator
oscillator is running while the rest of the device is sleeping, allowing very fast start-up combined
with low power consumption.
The device is manufactured using Atmel’s high density non-volatile memory technology. The on-
chip ISP Flash allows the Program memory to be re-programmed in-system through an SPI
serial interface, by a conventional non-volatile memory programmer or by an on-chip boot code
running on the AVR core.
The ATtiny24A/44A/84A AVR is supported with a full suite of program and system development
tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators and Evaluation
kits.
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