Datasheet 搜索 > 微控制器 > ATMEL（爱特美尔） > ATTINY45-20SH 数据手册 > ATTINY45-20SH 用户编程技术手册 2/234 页
器件3D模型￥ 7.179
ATTINY45-20SH 用户编程技术手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
微控制器
封装:
SOIC-8
描述:
8 位 tinyAVR® 微控制器，AtmelAtmel 的 tinyAVR® 设备经优化处理，适用于需要性能、电源效率、易于使用且采用小型封装的应用。体积小巧，适用于注重尺寸的应用 电容式触摸 快速，且代码高效 高集成 1.8V 至 5.5V 工作 (ATtiny43U) ### AVR 微控制器，Atmel
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2P54Hot
典型应用电路图在P113
原理图在P4P7P52P64P67P68P70P83P84P95P96P107
封装尺寸在P206P207P208P209P210P217
型号编码规则在P203P204P205P219P220
封装信息在P206
功能描述在P108
应用领域在P31
电气规格在P52P138P218P219
导航目录
ATTINY45-20SH数据手册
Page:
of 234 Go
若手册格式错乱，请下载阅览PDF原文件
2
ATtiny25/45/85 [DATASHEET]
2586O–AVR–02/13
1. Pin Configurations
Figure 1-1. Pinout ATtiny25/45/85
1.1 Pin Descriptions
1.1.1 VCC
Supply voltage.
1.1.2 GND
Ground.
1.1.3 Port B (PB5:PB0)
Port B is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers
have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
1
2
3
4
8
7
6
5
(PCINT5/RESET/ADC0/dW) PB5
(PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3
(PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4
GND
VCC
PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)
PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)
PB0 (MOSI/DI/SDA/AIN0/OC0A/OC1A/AREF/PCINT0)
PDIP/SOIC/TSSOP
1
2
3
4
5
QFN/MLF
15
14
13
12
11
20
19
18
17
16
6
7
8
9
10
DNC
DNC
GND
DNC
DNC
DNC
DNC
DNC
DNC
DNC
NOTE: Bottom pad should be soldered to ground.
DNC: Do Not Connect
NOTE: TSSOP only for ATtiny45/V
(PCINT5/RESET/ADC0/dW) PB5
(PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3
DNC
DNC
(PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4
VCC
PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)
DNC
PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)
PB0 (MOSI/DI/SDA/AIN0/OC0A/OC1A/AREF/PCINT0)
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
