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CDCP1803RTHR
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CDCP1803RTHR数据手册
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(1)
Thermal pad must be connected to V
SS
.
P0025-02
18
17
16
15
14
13
S0
V
DD
1
Y1
Y1
V
DD
1
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
EN
V
DD
PECL
IN
IN
V
DD
PECL
VBB
S2
V
DD
0
Y0
Y0
V
DD
0
S1
V
SS
V
DD
2
Y2
Y2
V
DD
2
NC
V
SS
(1)
RTH PACKAGE
(TOP VIEW)
V
SS
(1)
S0
V
DD
1
Y1
Y1
V
DD
1
V
SS
18
17
16
15
14
13
1
2
3
4
5
6
EN
V
DD
PECL
IN
IN
V
DD
PECL
VBB
24 23 22 21 20 19
7 8 9 10 11 12
S2
V
DD
0
Y0
Y0
V
DD
0
S1
V
SS
V
DD
2
Y2
Y2
V
DD
2
NC
RGE PACKAGE
(TOP VIEW)
(1)
Thermal pad must be connected to V
SS
.
P0024-02
CDCP1803
www.ti.com
SCAS727F NOVEMBER 2003REVISED DECEMBER 2013
1:3 LVPECL CLOCK BUFFER
WITH PROGRAMMABLE DIVIDER
Check for Samples: CDCP1803
1
FEATURES
Distributes One Differential Clock Input to
Three LVPECL Differential Clock Outputs
Programmable Output Divider for Two LVPECL
Outputs
Low-Output Skew 15 ps (Typical)
V
CC
Range 3 V–3.6 V
Signaling Rate Up to 800-MHz LVPECL
Differential Input Stage for Wide Common-
Mode Range
Provides VBB Bias Voltage Output for Single-
Ended Input Signals
Receiver Input Threshold ±75 mV
24-Terminal QFN Package (4 mm × 4 mm)
Accepts Any Differential Signaling:
LVDS, HSTL, CML, VML, SSTL-2, and
Single-Ended: LVTTL/LVCMOS
DESCRIPTION
The CDCP1803 clock driver distributes one pair of
differential clock inputs to three pairs of LVPECL
differential clock outputs Y[2:0] and Y[2:0] with
minimum skew for clock distribution. The CDCP1803
is specifically designed for driving 50- transmission
lines.
The CDCP1803 has three control terminals, S0, S1,
and S2, to select different output mode settings; see
Table 1 for details. The CDCP1803 is characterized
for operation from –40°C to 85°C. For use in single-
ended driver applications, the CDCP1803 also
provides a VBB output terminal that can be directly
connected to the unused input as a common-mode
voltage reference.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

CDCP1803RTHR 数据手册

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CDCP1803 数据手册

TI(德州仪器)
具有可编程除法器的 1:3 LVPECL 时钟缓冲器
TI(德州仪器)
TEXAS INSTRUMENTS  CDCP1803RGET.  芯片, 时钟驱动器, 3路, 800MHZ, QFN-24
TI(德州仪器)
时钟缓冲器 1:3 LVPECL CLOCK BUFFER
TI(德州仪器)
1 : 3 LVPECL时钟具有可编程分频器的BUFFER 1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
TI(德州仪器)
时钟缓冲器 1:3 LVPECL CLOCK BUFFER
TI(德州仪器)
TI(德州仪器)
TI(德州仪器)
TI(德州仪器)
具有可编程除法器的增强型产品 1.3 LVPECL 时钟缓冲器
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