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EPF10K20RC208-3 用户编程技术手册 - Intel（英特尔）
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Altera Corporation 3
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
■ Flexible interconnect
–FastTrack
®
Interconnect continuous routing structure for fast,
predictable interconnect delays
– Dedicated carry chain that implements arithmetic functions such
as fast adders, counters, and comparators (automatically used by
software tools and megafunctions)
– Dedicated cascade chain that implements high-speed,
high-fan-in logic functions (automatically used by software tools
and megafunctions)
– Tri-state emulation that implements internal tri-state buses
– Up to six global clock signals and four global clear signals
■ Powerful I/O pins
– Individual tri-state output enable control for each pin
– Open-drain option on each I/O pin
– Programmable output slew-rate control to reduce switching
noise
– FLEX 10KA devices support hot-socketing
■ Peripheral register for fast setup and clock-to-output delay
■ Flexible package options
– Available in a variety of packages with 84 to 600 pins (see
Tables 4 and 5)
– Pin-compatibility with other FLEX 10K devices in the same
package
– FineLine BGA
TM
packages maximize board space efficiency
■ Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, HP 9000 Series 700/800 workstations
■ Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
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