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EPF10K20RC240-4数据手册
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2 Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Note to tables:
(1) The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 31,250 gates in addition to the listed typical or maximum
system gates.
...and More
Features
Devices are fabricated on advanced processes and operate with
a 3.3-V or 5.0-V supply voltage (see Table 3
In-circuit reconfigurability (ICR) via external configuration
device, intelligent controller, or JTAG port
ClockLock
TM
and ClockBoost
TM
options for reduced clock
delay/skew and clock multiplication
Built-in low-skew clock distribution trees
–100% functional testing of all devices; test vectors or scan chains
are not required
Table 2. FLEX 10K Device Features
Feature EPF10K70 EPF10K100
EPF10K100A
EPF10K130V EPF10K250A
Typical gates (logic and
RAM) (1)
70,000 100,000 130,000 250,000
Maximum system gates 118,000 158,000 211,000 310,000
LEs 3,744 4,992 6,656 12,160
LABs 468 624 832 1,520
EABs 9 12 16 20
Total RAM bits 18,432 24,576 32,768 40,960
Maximum user I/O pins 358 406 470 470
Table 3. Supply Voltages for FLEX 10K & FLEX 10KA Devices
5.0-V Devices 3.3-V Devices
EPF10K10
EPF10K20
EPF10K30
EPF10K40
EPF10K50
EPF10K70
EPF10K100
EPF10K10A
EPF10K30A
EPF10K50V
EPF10K100A
EPF10K130V
EPF10K250A

EPF10K20RC240-4 数据手册

Altera(阿尔特拉)
128 页 / 1.8 MByte
Altera(阿尔特拉)
18 页 / 0.47 MByte
Altera(阿尔特拉)
5 页 / 0.21 MByte
Altera(阿尔特拉)
1 页 / 0.14 MByte

EPF10K20 数据手册

Altera(阿尔特拉)
Altera(阿尔特拉)
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可编程逻辑器件(CPLD/FPGA) EPF10K20RC208-4 QFP-208
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可编程逻辑器件(CPLD/FPGA) EPF10K20TC144-4N TQFP-144
Altera(阿尔特拉)
可编程逻辑器件(CPLD/FPGA) EPF10K20RC240-4 QFP-240
Altera(阿尔特拉)
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FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 182 IOs
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