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FT4222HQ-R
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FT4222HQ-R数据手册
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Copyright © 2008 Future Technology Devices International Limited 4
Document Reference No.: FT_000078
FTDI Device EEPROM Programming Using a Vinculum VNC1L Application Note AN_105
Version 1.00
Clearance No.:
FTDI# 59
2 Project Setup
2.1 Hardware Setup
The hardware required in this application is an FTDI VDIP1 development module and an FTDI TTL-232R-
3V3 cable. The VDIP1 module contains a VNC1L. A PC is used to communicate with the VNC1L on the
VDIP1 via the TTL-232-3V3 cable. The cable connects to the USB port of a PC and converts USB
signalling to a serial UART interface (at TTL levels). The serial UART signals connect to the VDIP1 module
via a six way header. The pin out for the six way header is described in Table 2.1 and Figure 2.1. The
monitor port of the VDIP1 must be configured in UART mode by setting the jumper links J3 and J4 on the
VDIP1 module as shown in Figure 2.1.
Figure 2.1 Jumper Configuration and TTL-232R-3V3 Connection on VDIP1
TTL Cable Header
Pin Number
TTL Cable
Header Pin Name
VDIP1 Pin Name VDIP1 Pin Number
Pin 1 (Black)
GND <-> GND Pin 7
Pin 2 (Brown)
CTS# <-> ADBUS2 (RTS#) Pin 9
Pin 3 (Red)
VCC <-> 5V Pin 1
Pin 4 (Orange)
TXD <-> ADBUS1 (RXD) Pin 8
Pin 5 (Yellow)
RXD <-> ADBUS0 (TXD) Pin 6
Pin 6 (Green)
RTS# <-> ADBUS3 (CTS#) Pin 10
Table 2.1 Pin Connections Between VDIP1 and TTL-232R-3V3
An alternative setup would be to attach a MCU or FPGA to the monitor port of the VDIP1 instead of the PC
and TTL-232R-3V3 cable.
To program the EEPROM of an FTxxx peripheral device, connect the USB socket of the FTxxx device into
the USB host port on the VDIP1 and then run the C application on the PC.

FT4222HQ-R 数据手册

FTDI Chip(飞特帝亚)
49 页 / 2.04 MByte
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51 页 / 0.75 MByte
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47 页 / 1.44 MByte
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17 页 / 0.88 MByte
FTDI Chip(飞特帝亚)
1 页 / 0.15 MByte

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