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MC68HC11F1CFN2 用户编程技术手册 - NXP（恩智浦）
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NXP（恩智浦）
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微控制器
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LCC-68
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MC68HC11F1CFN2数据手册
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Section Page
MC68HC11F1/FC0
4 MC68HC11FTS/D
1 Introduction
1
1.1 Features ......................................................................................................................................1
1.2 Ordering Information ...................................................................................................................2
1.3 Block Diagrams ..........................................................................................................................6
2 Pin Assignments and Signal Descriptions
8
2.1 MC68HC11F1 Pin Assignments ..................................................................................................8
2.2 MC68HC11FC0 Pin Assignments .............................................................................................10
2.3 Pin Descriptions ........................................................................................................................12
3 Control Registers
14
3.1 MC68HC11F1 Control Registers ...............................................................................................14
3.2 MC68HC11FC0 Control Registers ............................................................................................16
4 Operating Modes and System Initialization
18
4.1 Operating Modes .......................................................................................................................18
4.2 Memory Maps ............................................................................................................................19
4.3 System Initialization Registers ..................................................................................................20
5 Resets and Interrupts
25
5.1 Interrupt Sources .......................................................................................................................25
5.2 Reset and Interrupt Registers ...................................................................................................26
6 Electrically Erasable Programmable ROM
29
6.1 EEPROM Operation ..................................................................................................................29
6.2 EEPROM Registers ...................................................................................................................29
6.3 EEPROM Programming and Erasure ........................................................................................31
6.4 CONFIG Register Programming ...............................................................................................32
7 Parallel Input/Output
33
7.1 Port A ........................................................................................................................................33
7.2 Port B ........................................................................................................................................33
7.3 Port C ........................................................................................................................................33
7.4 Port D ........................................................................................................................................33
7.5 Port E ........................................................................................................................................33
7.6 Port F .........................................................................................................................................33
7.7 Port G ........................................................................................................................................34
7.8 Parallel I/O Registers ................................................................................................................34
8 Chip-Selects
38
8.1 Chip-Select Operation ...............................................................................................................38
8.2 Chip-Select Registers ................................................................................................................38
9 Serial Communications Interface (SCI)
42
9.1 SCI Block Diagrams ..................................................................................................................42
9.2 SCI Registers ............................................................................................................................44
10 Serial Peripheral Interface
49
10.1 SPI Block Diagram ....................................................................................................................49
10.2 SPI Registers ............................................................................................................................50
11 Analog-to-Digital Converter
53
11.1 Input Pins ..................................................................................................................................54
11.2 Conversion Sequence ...............................................................................................................54
11.3 A/D Registers ............................................................................................................................55
12 Main Timer
57
12.1 Timer Operation ........................................................................................................................57
12.2 Timer Registers .........................................................................................................................59
13 Pulse Accumulator
64
13.1 Pulse Accumulator Block Diagram ............................................................................................64
13.2 Pulse Accumulator Registers ....................................................................................................64
TABLE OF CONTENTS
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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