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PIC16F676-I/SL
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PIC16F676-I/SL数据手册
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PIC12F629/675/PIC16F630/676
DS41191D-page 6 © 2005 Microchip Technology Inc.
2.3.1.1 Load Configuration
After receiving this command, the Program Counter
(PC) will be set to 0x2000. Then, by applying 16 cycles
to the clock pin, the chip will load 14 bits in a data word,
as described above, which will be programmed into the
configuration memory. A description of the memory
mapping schemes of the program memory for normal
operation and Configuration mode operation is shown in
Figure 2-3. After the configuration memory is entered,
the only way to get back to the user program memory is
to exit the Program/Verify mode by taking MCLR
low
(V
IL).
FIGURE 2-3: LOAD CONFIGURATION COMMAND
2.3.1.2 Load Data For Program Memory
After receiving this command, the chip will load in a
14-bit data word when 16 cycles are applied, as
described previously. A timing diagram for the Load
Data command is shown in Figure 2-4.
FIGURE 2-4: LOAD DATA FOR PROGRAM MEMORY COMMAND
TSET1
T
HLD1
T
DLY1
T
DLY2
12 34 56
0 0 0
0
x
x
12 34 5 15
16
strt_bit
stp_bit
LSb MSb
0
GP1
(1)
GP0
(1)
CLOCK
DATA
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.
TSET1
T
HLD1
T
DLY1
TDLY2
12 34 56
0 0
0
x
x
12 34 5 15
16
strt_bit
stp_bit
LSb MSb
GP1
(1)
CLOCK
TSET1
T
HLD1
0
1
GP0
(1)
DATA
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.

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