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PIC18F25K40-I/SO
器件3D模型
1.779
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  • 引脚图在P2P27
  • 封装尺寸在P33
  • 封装信息在P33
  • 技术参数、封装参数在P24
  • 电气规格在P24
PIC18F25K40-I/SO数据手册
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PIC18(L)F2X/4XK40
DS40001772B-page 6 2014-2015 Microchip Technology Inc.
2.3 Configuration Words
The devices have six Configuration Words starting at address, 30 0000h. The individual bits within these Configuration
Words are critical to the correct operation of the system. Configuration bits enable or disable specific features, placing
these controls outside the normal software process, and they establish configured values prior to the execution of any
software.
In terms of programming, these important Configuration bits should be considered:
1. LVP: Low-Voltage Programming Enable bit
1 = ON Low-Voltage Programming is enabled. MCLR
/VPP pin function is MCLR.
MCLRE Configuration bit is ignored.
0 = OFF High Voltage on MCLR/VPP must be used for programming.
It is important to note that the LVP bit cannot be written (to ‘0’) while operating from the LVP programming interface. The
purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or
accidentally eliminating LVP mode from the configuration state. For more information, see Section 3.1.2 “Low-Voltage
Programming (LVP) Mode”.
2. MCLRE: Master Clear (MCLR
) Enable bit
If LVP = 1
RE3 pin function is MCLR
If LVP = 0
1 = MCLR
pin is MCLR
0 = MCLR pin function is a port defined function
3. CPD
: Data NVM (EEPROM) Memory Code Protection bit
1 = OFF – Data NVM code protection is disabled
0 = ON – Data NVM code protection is enabled
4. CP
: User NVM Program Memory Code Protection bit
1 = OFF – User NVM code protection is disabled
0 = ON – User NVM code protection is enabled
For more information on code protection, see Section 3.3 “Code Protection”.

PIC18F25K40-I/SO 数据手册

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