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PIC18F26J11-I/SP 用户编程技术手册 - Microchip（微芯）
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Microchip（微芯）
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微控制器
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DIP-28
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PIC18F2xJ11/4xJ11 8 位闪存微控制器### PIC18 微控制器
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PIC18F26J11-I/SP数据手册
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© 2009 Microchip Technology Inc. DS39687E-page 5
PIC18F2XJXX/4XJXX FAMILY
The Configuration Words for these devices are located
at addresses, 300000h through 300007h. These are
implemented as three pairs of volatile memory regis-
ters. Each register is automatically loaded from a copy
stored at the end of program memory. For this reason,
the last four words (or eight bytes) of the code space
(also called the Flash Configuration Words) should be
written with configuration data and not executable
code. The addresses of the Flash Configuration Words
are also listed in Table 2-2. Refer to section Section 5.0
“Configuration Word” for more information.
Locations, 3FFFFEh and 3FFFFFh, are reserved for
the device ID bits. These bits may be used by the
programmer to identify what device type is being pro-
grammed and are described in Section 5.1 “Device ID
Word”. These device ID bits read out normally, even
after code protection.
2.2.1 MEMORY ADDRESS POINTER
Memory in the device address space (000000h to
3FFFFFh) is addressed via the Table Pointer register,
which in turn, is comprised of three registers:
• TBLPTRU at RAM address 0FF8h
• TBLPTRH at RAM address 0FF7h
• TBLPTRL at RAM address 0FF6h
The 4-bit command, ‘0000’ (core instruction), is used to
load the Table Pointer prior to using many read or write
operations.
TBLPTRU TBLPTRH TBLPTRL
Addr[21:16] Addr[15:8] Addr[7:0]
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