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PIC18F2XXX/4XXX FAMILY
DS39622L-page 4 2010 Microchip Technology Inc.
2.3 Memory Maps
For PIC18FX6X0 devices, the code memory space
extends from 0000h to 0FFFFh (64 Kbytes) in four
16-Kbyte blocks. For PIC18FX5X5 devices, the code
memory space extends from 0000h to 0BFFFFh
(48 Kbytes) in three 16-Kbyte blocks. Addresses,
0000h through 07FFh, however, define a “Boot Block”
region that is treated separately from Block 0. All of
these blocks define code protection boundaries within
the code memory space.
The size of the Boot Block in PIC18F2585/2680/4585/
4680 devices can be configured as 1, 2 or 4K words
(see Figure 2-3). This is done through the BBSIZ<1:0>
bits in the Configuration register, CONFIG4L. It is
important to note that increasing the size of the Boot
Block decreases the size of Block 0.
TABLE 2-2: IMPLEMENTATION OF CODE
MEMORY
FIGURE 2-3: MEMORY MAP AND THE CODE MEMORY SPACE FOR PIC18FX5X5/X6X0 DEVICES
Device Code Memory Size (Bytes)
PIC18F2515
000000h-00BFFFh (48K)
PIC18F2525
PIC18F2585
PIC18F4515
PIC18F4525
PIC18F4585
PIC18F2610
000000h-00FFFFh (64K)
PIC18F2620
PIC18F2680
PIC18F4610
PIC18F4620
PIC18F4680
000000h
200000h
3FFFFFh
01FFFFh
Note: Sizes of memory areas are not to scale.
* Boot Block size is determined by the BBSIZ<1:0> bits in the CONFIG4L register.
Code Memory
Unimplemented
Read as ‘0
Configuration
and ID
Space
MEMORY SIZE/DEVICE
Address
Range
64 Kbytes
(PIC18FX6X0)
BBSIZ<1:0>
11/10 01 00
Boot
Boot
000000h
0007FFh
Block 0
000800h
000FFFh
Block 0
001000h
001FFFh
Block 0
002000h
003FFFh
Block 1
004000h
00FFFFh
Unimplemented
Reads all ‘0’s
01FFFFh
Block*
Block*
11/10 01 00
48 Kbytes
(PIC18FX5X5)
Boot
Block*
Boot
Block*
Boot
Block*
Boot
Block*
Block 0
Block 0
Block 0
Unimplemented
Reads all ‘0’s
Block 2
Block 3
Block 2
Block 1
007FFFh
008000h
00BFFFh
00C000h

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