Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC18F6622-I/PT 数据手册 > PIC18F6622-I/PT 用户编程技术手册 4/44 页
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PIC18F6622-I/PT 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-64
描述:
PIC18F6527/6622/6627/6722 8 位闪存微控制器### PIC18 微控制器
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PIC18F6622-I/PT数据手册
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若手册格式错乱，请下载阅览PDF原文件
PIC18F872X FAMILY
DS39643C-page 4 © 2009 Microchip Technology Inc.
2.3 Memory Maps
For PIC18F6622/8622 devices, the code memory
space extends from 000000h to 00FFFFh (64 Kbytes)
in four 16-Kbyte blocks. For PIC18F6527/8527
devices, the code memory space extends from
000000h to 00BFFFh (48 Kbytes) in three 16-Kbyte
blocks. Addresses, 0000h through 07FFh, however,
define a “Boot Block” region that is treated separately
from Block 0. All of these blocks define code protection
boundaries within the code memory space.
The size of the Boot Block in PIC18F6527/6622/8527/
8622 devices can be configured as 1, 2 or 4K words
(see Table 5-1). This is done through the BBSIZ<1:0>
bits in the Configuration register, CONFIG4L. It is
important to note that increasing the size of the Boot
Block decreases the size of Block 0.
TABLE 2-2: IMPLEMENTATION OF CODE
MEMORY
FIGURE 2-3: MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18F6527/6622/8527/8622 DEVICES
Device Code Memory Size (Bytes)
PIC18F6527
000000h-00BFFFh (48K)
PIC18F8527
PIC18F6622
000000h-00FFFFh (64K)
PIC18F8622
000000h
200000h
3FFFFFh
01FFFFh
Note: Sizes of memory areas are not to scale.
* Boot Block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
Code Memory
Unimplemented
Read as ‘0’
Configuration
and ID
Space
MEMORY SIZE/DEVICE
64 Kbytes
(PIC18F6622/8622)
48 Kbytes
(PIC18F6527/8527)
Address
Range
Boot Block Boot Block
000000h
0007FFh* or 000FFFh* or 001FFFh*
Block 0 Block 0
000800h* or 001000h* or 002000h*
003FFFh
Block 1 Block 1
004000h
007FFFh
Block 2 Block 2
008000h
00BFFFh
Block 3
Unimplemented
Read ‘0’s
00C000h
00FFFFh
Unimplemented
Read ‘0’s
010000h
013FFFh
014000h
017FFFh
018000h
01BFFFh
01C000h
01FFFFh
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