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PIC18F6627T-I/PT 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
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TQFP-64
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PIC18F6627T-I/PT数据手册
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© 2009 Microchip Technology Inc. DS39643C-page 5
PIC18F872X FAMILY
For PIC18F6722/8722/6723/8723 devices, the code
memory space extends from 000000h to 01FFFFh
(128 Kbytes) in eight 16-Kbyte blocks. For
PIC18F6627/8627/6628/8628 devices, the code mem-
ory space extends from 000000h to 017FFFh
(96 Kbytes) in six 16-Kbyte blocks. Addresses, 0000h
through 07FFh, however, define a “Boot Block” region
that is treated separately from Block 0. All of these
blocks define code protection boundaries within the
code memory space.
The size of the Boot Block in PIC18F6627/6722/8627/
8722/8723/8628/6723/6628 devices can be configured
as 1, 2 or 4K words (see Table 5-1). This is done through
the BBSIZ<1:0> bits in the Configuration register,
CONFIG4L. It is important to note that increasing the
size of the Boot Block decreases the size of Block 0.
TABLE 2-3: IMPLEMENTATION OF CODE
MEMORY
FIGURE 2-4: MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18F6627/6722/8627/8722/8723/8628/6723/6628 DEVICES
Device Code Memory Size (Bytes)
PIC18F6627
000000h-017FFFh (96K)
PIC18F8627
PIC18F6628
PIC18F8628
PIC18F6722
000000h-01FFFFh (128K)
PIC18F8722
PIC18F6723
PIC18F8723
000000h
200000h
3FFFFFh
01FFFFh
Note: Sizes of memory areas are not to scale.
* Boot Block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
Code Memory
Unimplemented
Read as ‘0’
Configuration
and ID
Space
MEMORY SIZE/DEVICE
128 Kbytes
(PIC18F6722/8722)
96 Kbytes
(PIC18F6627/8627)
Address
Range
Boot Block Boot Block
000000h
0007FFh* or 000FFFh* or 001FFFh*
Block 0 Block 0
000800h* or 001000h* or 002000h*
003FFFh
Block 1 Block 1
004000h
007FFFh
Block 2 Block 2
008000h
00BFFFh
Block 3 Block 3
00C000h
00FFFFh
Block 4 Block 2
010000h
013FFFh
Block 5 Block 5
014000h
017FFFh
Block 6
Unimplemented
Read ‘0’s
018000h
01BFFFh
Block 7
01C000h
01FFFFh
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