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PSD813F2A-90UI 用户编程技术手册 - ST Microelectronics(意法半导体)
制造商:
ST Microelectronics(意法半导体)
分类:
存储芯片
封装:
TQFP-64
描述:
Flash在系统可编程ISP外设对于8位MCU Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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PSD813F2A-90UI数据手册
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May 2009 Doc ID 7833 Rev 7 1/128
1
PSD8XXFX
Flash in-system programmable (ISP)
peripherals for 8-bit MCUs, 5 V
Features
■ Flash in-system programmable (ISP)
peripheral for 8-bit MCUs
■ Dual bank Flash memories
– Up to 2 Mbit of primary Flash memory (8
uniform sectors, 32K x8)
– Up to 256 Kbit secondary Flash memory (4
uniform sectors)
– Concurrent operation: read from one
memory while erasing and writing the other
■ Up to 256 Kbit SRAM
■ 27 reconfigurable I/Oports
■ Enhanced JTAG serial port
■ PLD with macrocells
– Over 3000 gates of PLD: CPLD and DPLD
– CPLD with 16 output macrocells (OMCs)
and 24 input macrocells (IMCs)
– DPLD - user defined internal chip select
decoding
■ 27 individually configurable I/O port pins
They can be used for the following functions:
– MCU I/Os
– PLD I/Os
– Latched MCU address output
– Special function I/Os.
– 16 of the I/O ports may be configured as
open-drain outputs.
■ In-system programming (ISP) with JTAG
– Built-in JTAG compliant serial port allows
full-chip in-system programmability
– Efficient manufacturing allow easy product
testing and programming
– Use low cost FlashLINK cable with PC
■ Page register
– Internal page register that can be used to
expand the microcontroller address space
by a factor of 256
■ Programmable power management
■ Packages are ECOPACK
®
Table 1. Device summary
Reference Part number
PSD8XXFX
PSD813F2
PSD813F4
PSD813F5
PSD833F2
PSD834F2
PSD853F2
PSD854F2
PQFP52 (M)
PLCC52 (J)
TQFP64 (U)
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