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74HC688DB
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74HC688DB数据手册
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December 1990 2
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
FEATURES
Compare two 8-bit words
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT688 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT688 are 8-bit magnitude comparators.
They perform comparison of two 8-bit binary or BCD
words.
The output provides P = Q.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; t
r
=t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in µW):
P
D
=C
PD
× V
CC
2
× f
i
+ ∑ (C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
× V
CC
2
× f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL/
t
PLH
propagation delay C
L
= 15 pF; V
CC
=5 V
P
n
, Q
n
to P = Q 1717ns
E to
P = Q 8 12 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per package notes 1 and 2 30 30 pF

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