Datasheet 搜索 > 8位微控制器 > Microchip（微芯） > PIC16F1704T-I/ST 数据手册 > PIC16F1704T-I/ST 数据手册 5/472 页
器件3D模型￥ 8.281
PIC16F1704T-I/ST 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
8位微控制器
封装:
TSSOP-14
描述:
PIC 32MHz 闪存：4K@x14bit
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P11P12P13P14P15P16P147P170P272P274P369Hot
典型应用电路图在P157P370
原理图在P10P17P55P64P76P99P139P148P154P160P162P169
封装尺寸在P442
标记信息在P439P440P441
封装信息在P439P443P444P446P447P449P452P453P454P455P469
技术参数、封装参数在P67P71P84P97P98P162P163P241P395P400P410P411
应用领域在P53
电气规格在P71P84P97P98
导航目录
PIC16F1704T-I/ST数据手册
Page:
of 472 Go
若手册格式错乱，请下载阅览PDF原文件
2013 Microchip Technology Inc. Preliminary DS40001715B-page 5
PIC16(L)F1704/8
TABLE 1: 14/16-PIN ALLOCATION TABLE (PIC16(L)F1704)
I/O
(2)
PDIP/SOIC/SSOP
QFN
ADC
Reference
Comparator
Op Amp
DAC
Zero Cross
Timers
CCP
PWM
COG
MSSP
EUSART
CLC
Interrupt
Pull-up
Basic
RA0 13 12 AN0 VREF- C1IN+ — DAC1OUT — — — — — — — IOC Y ICSPDAT
RA1 12 11 AN1 VREF+ C1IN0-
C2IN0-
————— ————IOC Y ICSPCLK
RA2 11 10 AN2 — — — DAC1OUT2 ZCD T0CKI
(1)
— COGIN
(1)
— — — INT
(1)
IOC
Y —
RA3 4 3 — — — — — ——— ————IOC Y MCLR
VPP
RA4 3 2 AN3
— — — — —
T1G
(1)
SOSCO
— — — — —
IOC Y CLKOUT
OSC2
RA5 2 1 — — —— — —T1CKI
(1)
SOSCI
————
CLCIN3
(1)
IOC Y CLKIN
OSC1
RC0 10 9 AN4 — C2IN+
OPA1IN+ — — — — — SCK
(1)
SCL
(3)
— —
IOC Y —
RC1 9 8 AN5 — C1IN1-
C2IN1-
OPA1IN- — — — — — SDI
(1)
SDA
(3)
— CLCIN2
(1)
IOC Y —
RC2 8 7 AN6 — C1IN2-
C2IN2-
OPA1OUT
— — — — — — — —
IOC Y —
RC3 7 6 AN7 — C1IN3-
C2IN3-
OPA2OUT — — — CCP2
(1)
—SS
(1)
— CLCIN0
(1)
IOC Y —
RC4 6 5
— — — OPA2IN- — — — — — — CK
(1)
CLCIN1
(1)
IOC Y —
RC5 5 4 — — —OPA2IN+ — — — CCP1
(1)
——RX
(1,3)
— IOC Y —
VDD 1 16
— — — — — — — — — — — — — —
VDD
VSS 14 13 — — — — — — — — — — — — — — VSS
OUT
(2)
— — — — C1OUT — — — — CPP1 PWM3OUT COGA SDA
(3)
CK CLC1OUT — — —
— — — — C2OUT — — — — CPP2 PWM4OUT COGB SCL
(3)
DT
(3)
CLC2OUT — — —
— — — — — — — — — — — COGC SDO TX CLC3OUT — — —
————— — — ——— —COGDSCK—————
Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. See Register 12-1.
2: All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers. See Register 12-3.
3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
