器件3D模型

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PIC16F1704T-I/ST 数据手册 - Microchip（微芯）

制造商:

Microchip（微芯）

分类:

8位微控制器

封装:

TSSOP-14

描述:

PIC 32MHz 闪存：4K@x14bit

Pictures:

3D模型

符号图

焊盘图

引脚图

产品图

页面导航:

引脚图在P3P11P12P13P14P15P16P147P170P272P274P369Hot

典型应用电路图在P157P370

原理图在P10P17P55P64P76P99P139P148P154P160P162P169

封装尺寸在P442

标记信息在P439P440P441

封装信息在P439P443P444P446P447P449P452P453P454P455P469

技术参数、封装参数在P67P71P84P97P98P162P163P241P395P400P410P411

应用领域在P53

电气规格在P71P84P97P98

导航目录

引脚图在P3 P11 P12 P13 P14 P15 P16 P147 P170 P272 P274 P369
典型应用电路图在P157 P370
原理图在P10 P17 P55 P64 P76 P99 P139 P148 P154 P160 P162 P169
封装尺寸在P442
标记信息在P439 P440 P441
封装信息在P439 P443 P444 P446 P447 P449 P452 P453 P454 P455 P469
技术参数、封装参数在P67 P71 P84 P97 P98 P162 P163 P241 P395 P400 P410 P411
应用领域在P53
电气规格在P71 P84 P97 P98

PIC16F1704T-I/ST数据手册

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PIC16(L)F1704/8

DS40001715B-page 6 Preliminary  2013 Microchip Technology Inc.

TABLE 2: 20-PIN ALLOCATION TABLE (PIC16(L)F1708)

I/O

(2)

PDIP/SOIC/

SSOP

QFN

ADC

Reference

Comparator

Op Amp

DAC

Zero Cross

Timers

CCP

PWM

COG

MSSP

EUSART

CLC

Interrupt

Pull-up

Basic

RA0 19 16 AN0 VREF- C1IN+ — DAC1OUT — — — — — — — — IOC Y ICSPDAT

RA1 18 15 AN1 VREF+ C1IN0-

C2IN0-

——————————IOC Y ICSPCLK

RA2 17 14 AN2 — — — DAC1OUT2 ZCD T0CKI

(1)

— — COGIN

(1)

— — — INT

(1)

IOC

Y —

RA3 4 1 — — —— — ——— — ————IOC Y MCLR

VPP

RA4 3 20 AN3

— — — — —

T1G

(1)

SOSCO

— — — — — —

IOC Y CLKOUT

OSC2

RA5 2 19 — — —— — —T1CKI

SOSCI

—————CLCIN3

(1)

IOC Y CLKIN

OSC1

RB4 13 10 AN10 — — OPA1IN-

— — — — — —

SCK

(1)

SDA

(3)

—

IOC Y —

RB5 12 9 AN11 — — OPA1IN+ — — —— — ——RX

(1,3)

IOC Y —

RB6 11 8

— — — — — — — — — —

SDI

(1)

SCL

(3)

—

IOC Y —

RB7 10 7 — — —— — ——— — ——CK

(1)

— IOC Y —

RC0 16 13 AN4 — C2IN+

— — — — — — — — — —

IOC Y —

RC1 15 12 AN5 — C1IN1-

C2IN1-

—————————CLCIN2

(1)

IOC Y —

RC2 14 11 AN6 — C1IN2-

C2IN2-

OPA1OUT

— — — — — — — — —

IOC Y —

RC3 7 4 AN7 — C1IN3-

C2IN3-

OPA2OUT — — — CCP2

(1)

————CLCIN0

(1)

IOC Y —

RC4 6 3

— — — — — — — — — — — —

CLCIN1

(1)

IOC Y —

RC5 5 2 — — —— — —— CCP1

(1)

—————IOC Y —

RC6 8 5 AN8

— — OPA2IN- — — — — — —

(1)

— —

IOC Y —

RC7 9 6 AN9 — —OPA2IN+ — — — — — — — — — IOC Y —

VDD 1 18

— — — — — — — — — — — — — — —

VDD

VSS 20 17 — — — — — — — — — — — — — — — VSS

OUT

(2)

— — — — C1OUT — — — — CPP1 PWM3OUT COGA SDA

(3)

CK CLC1OUT — — —

— — — — C2OUT — — — — CPP2 PWM4OUT COGB SCL

(3)

CLC2OUT — — —

— — — — — — — — — — — COGC SDO TX CLC3OUT — — —

————— — — ——— —COGDSCK—————

Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. See Register 12-2.

2: All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers. See Register 12-3.

3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.

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