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STM32L071V8 数据手册 - ST Microelectronics（意法半导体）
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STM32L071V8数据手册
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STM32L071x8/B/Z silicon limitations STM32L071x8/B/Z
6/20 DocID027209 Rev 3
2 STM32L071x8/B/Z silicon limitations
Table 3 gives quick references to all documented limitations.
Legend for Table 3: A = workaround available; N = no workaround available; P = partial
workaround available, ‘-’ and grayed = fixed.
Table 3. Summary of silicon limitations
Links to silicon limitations
Revision A
(samples)
Rev B Rev Z
Section 2.1: System
limitations
Section 2.1.1: Delay after an RCC peripheral
clock enabling
AAA
Section 2.1.2: BFB2 bit does not select boot
from Bank 2 system memory
AA
-
Section 2.1.3: Interrupts masked when using
dual-bank boot mechanism
AAA
Section 2.1.4: PE2 AF2 alternate function
(TIM3_ETR) not available
A
- -
Section 2.1.5: PB4 not available on
UFQFPN32 package
N
- -
Section 2.1.6: Flash memory wakeup issue
when waking up from Stop or Sleep with Flash
in power-down mode
A - -
Section 2.1.7: Unexpected system reset when
waking up from Stop mode with regulator in
low-power mode
A
- -
Section 2.1.8: Electrical sensitivity
characteristics
NNN
Section 2.1.9: I2C and USART cannot wake
up the device from Stop mode
NN
-
Section 2.1.10: LDM, STM, PUSH and POP
not allowed in IOPORT bus
NNN
Section 2.1.11: BOOT_MODE bits do not
reflect the selected boot mode
NN
-
Section 2.2: Comparator
limitations
Section 2.2.1: COMP1_CSR and
COMP2_CSR lock bit reset by SYSCFGRST
bit in RCC_APB2RSTR register
NNN
Section 2.2.2: Output of comparator 2 cannot
be internally connected to input 1 of low-power
timer
A
- -
Section 2.3: RTC
limitations
Section 2.3.1: Spurious tamper detection when
disabling the tamper channel
NNN
Section 2.3.2: Detection of a tamper event
occurring before enabling the tamper detection
is not supported in edge detection mode
AAA
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