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5CSEBA5U23C7S-N 其他数据使用手册 - Altera(阿尔特拉)
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Altera(阿尔特拉)
分类:
FPGA芯片
封装:
UFBGA
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3D模型
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引脚图在P31Hot
典型应用电路图在P5P7P9P11P13P15
型号编码规则在P5P7P9P11P13P15
封装信息在P2
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5CSEBA5U23C7S-N数据手册
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Feature Description
Configuration • Tamper protection—comprehensive design protection to protect your
valuable IP investments
• Enhanced advanced encryption standard (AES) design security features
• CvP
• Partial and dynamic reconfiguration of the FPGA
• Active serial (AS) x1 and x4, passive serial (PS), JTAG, and fast passive
parallel (FPP) x8 and x16 configuration options
Cyclone V Device Variants and Packages
Table 3: Device Variants for the Cyclone V Device Family
Variant Description
Cyclone V E
Optimized for the lowest system cost and power requirement for a wide
spectrum of general logic and DSP applications
Cyclone V GX
Optimized for the lowest cost and power requirement for 614 Mbps to
3.125 Gbps transceiver applications
Cyclone V GT
The FPGA industry’s lowest cost and lowest power requirement for
6.144 Gbps transceiver applications
Cyclone V SE
SoC with integrated ARM-based HPS
Cyclone V SX
SoC with integrated ARM-based HPS and 3.125 Gbps transceivers
Cyclone V ST
SoC with integrated ARM-based HPS and 5 Gbps transceivers
Cyclone V E
This section provides the available options, maximum resource counts, and package plan for the
Cyclone V E devices.
The information in this section is correct at the time of publication. For the latest information and to get
more details, refer to the Altera Product Selector.
Related Information
Altera Product Selector
Provides the latest information about Altera products.
Available Options
4
Cyclone V Device Variants and Packages
CV-51001
2014.10.06
Altera Corporation
Cyclone V Device Overview
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