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AT91SAM9G20B-CU 其他数据使用手册 - ATMEL(爱特美尔)
制造商:
ATMEL(爱特美尔)
分类:
微控制器
封装:
BGA-217
描述:
SMART SAM9G ARM® 9 微处理器基于 ARM926™ 的 Atmel® SMART SAM9G 嵌入式微处理器单元 (MPU) 是高性能数据速度处理器,带扩展外围设备,用于连接和用户界面。### ARM 微控制器,Atmel
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P60P317P342P393P419P519P591P634P744Hot
典型应用电路图在P59P421P436P491P531P674P712
原理图在P4P25P27P28P40P58P87P101P107P113P119P136
封装尺寸在P9P11P796P798P820
型号编码规则在P800P821
标记信息在P801P802P810
封装信息在P796P799
功能描述在P61P88P101P107P114P120P142P206P224P268P318P368
技术参数、封装参数在P820
应用领域在P316
电气规格在P14P88P134P284P767P775P796P820P822
导航目录
AT91SAM9G20B-CU数据手册
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2
6384E–ATARM–05-Feb-10
AT91SAM9G20
– Mode for General Purpose 2-wire UART Serial Communication
• Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
• Watchdog Timer (WDT)
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
• Real-time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
• One 4-channel 10-bit Analog-to-Digital Converter
• Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– All I/O Lines are Schmitt Trigger Inputs
• Peripheral DMA Controller Channels (PDC)
• One Two-slot MultiMedia Card Interface (MCI)
– SDCard/SDIO and MultiMediaCard
™
Compliant
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
• One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA
®
Infrared Modulation/Demodulation, Manchester Encoding/Decoding
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Signal Control on USART0
• Two 2-wire UARTs
• Two Master/Slave Serial Peripheral Interfaces (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Synchronous Communications
• Two Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2
• One Two-wire Interface (TWI)
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in Master Mode
• IEEE
®
1149.1 JTAG Boundary Scan on All Digital Pins
• Required Power Supplies
– 0.9V to 1.1V for VDDBU, VDDCORE, VDDPLL
– 1.65 to 3.6V for VDDOSC
– 1.65V to 3.6V for VDDIOP (Peripheral I/Os)
– 3.0V to 3.6V for VDDUSB
– 3.0V to 3.6V VDDANA (Analog-to-digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
• Available in a 217-ball LFBGA and 247-ball TFBGA RoHS-compliant Package
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