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AT91SAM9G20B-CU 其他数据使用手册 - Microchip(微芯)
制造商:
Microchip(微芯)
分类:
微控制器
封装:
LFBGA-217
描述:
SMART SAM9G ARM® 9 微处理器基于 ARM926™ 的 Atmel® SMART SAM9G 嵌入式微处理器单元 (MPU) 是高性能数据速度处理器,带扩展外围设备,用于连接和用户界面。
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P56P296P325P387P409P497P567P607P721Hot
典型应用电路图在P55P411P424P470P507P659P692
原理图在P4P27P28P29P40P54P79P92P99P106P112P128
封装尺寸在P10P12P768P770P790
型号编码规则在P773P790
标记信息在P772P790
封装信息在P768P771
功能描述在P56P79P92P99P106P113P134P191P209P250P297P350
应用领域在P295
电气规格在P18P266P724P742P749P768P790P791P792
导航目录
AT91SAM9G20B-CU数据手册
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SAM9G20
DS60001516A-page 2 2017 Microchip Technology Inc.
- Periodic Interval Timer, Watchdog Timer and Real-time Timer
• Reset Controller (RSTC)
- Based on a Power-on Reset Cell, Reset Source Identification and Reset Output Control
• Clock Generator (CKGR)
- Selectable 32768 Hz Low-power Oscillator or Internal Low Power RC Oscillator on Battery Backup Power Supply, Providing a Per-
manent Slow Clock
- 3 to 20 MHz On-chip Oscillator, One up to 800 MHz PLL and One up to 100 MHz PLL
• Power Management Controller (PMC)
- Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
- Two Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
- Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
- Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
• Debug Unit (DBGU)
- 2-wire UART and Support for Debug Communication Channel, Programmable ICE Access Prevention
- Mode for General Purpose 2-wire UART Serial Communication
• Periodic Interval Timer (PIT)
- 20-bit Interval Timer plus 12-bit Interval Counter
• Watchdog Timer (WDT)
- Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
• Real-time Timer (RTT)
- 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
• One 4-channel 10-bit Analog-to-Digital Converter
• Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
- 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
- Input Change Interrupt Capability on Each I/O Line
- Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
- All I/O Lines are Schmitt Trigger Inputs
• Peripheral DMA Controller Channels (PDC)
• One Two-slot MultiMedia Card Interface (MCI)
- SDCard/SDIO and MultiMediaCard
™
Compliant
- Automatic Protocol Control and Fast Automatic Data Transfers with PDC
• One Synchronous Serial Controller (SSC)
- Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
- I²S Analog Interface Support, Time Division Multiplex Support
- High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
- Individual Baud Rate Generator, IrDA
®
Infrared Modulation/Demodulation, Manchester Encoding/Decoding
- Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
- Full Modem Signal Control on USART0
• Two 2-wire UARTs
• Two Master/Slave Serial Peripheral Interfaces (SPI)
- 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
- Synchronous Communications
• Two Three-channel 16-bit Timer/Counters (TC)
- Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
- Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
- High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2
• One Two-wire Interface (TWI)
- Compatible with Standard Two-wire Serial Memories
- One, Two or Three Bytes for Slave Address
- Sequential Read/Write Operations
- Master, Multi-master and Slave Mode Operation
- Bit Rate: Up to 400 Kbit/s
- General Call Supported in Slave Mode
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