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EP1C20F324C8
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EP1C20F324C8数据手册
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Altera Corporation 10/14/2008 PCN0813
Qualification Data
Qualification data is summarized in Table 2.
Table 2. Summary of Qualification Data
Product
Family
Product
Line
Representative
Packages
Qualification Test Read Out Results
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycle 0 /64
High Temp Bake @ 150° C 1000 hrs 0 /64
Cyclone II
FPGA
EP2C50 F672
PCL 3 +Temperature Humidity
Bias (85°C/85%RH)
1000 hrs 0 /50
PCL 3 + HAST
(130°C/85%RH)
96 hrs 0 /50
F324
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycles 0 /154
PCL 3 + HAST
(130°C/85%RH)
96 hrs 0 /100
Cyclone FPGA EP1C12
Q240
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycles 0 /204
Life Test 1000 hrs 0 /308
F256
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycles 0 /180
Life Test 1000 hrs 0 /154
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycles 0 /90
MAX II CPLD EPM1270
T144
PCL 3 + HAST
(130°C/85%RH)
96 hrs 0 /90
PCL 3 + HAST
(130°C/85%RH)
96 hrs 0 /100
Stratix FPGA EP1S25 F672
PCL 3 + Temp Cycle "B"
(-55°C to 125°C)
1000 cycles 0 /200
Contact
For more information, please contact Altera Customer Quality Engineering at customer-
quality@altera.com.
In accordance with JESD46-C, this change is deemed acceptable to the customer if
no acknowledgement is received within 30 days from this notification.
Revision History
Date Rev Description
10/14/2008 1.0.0 Initial Release

EP1C20F324C8 数据手册

Altera(阿尔特拉)
385 页 / 5.45 MByte
Altera(阿尔特拉)
50 页 / 1.92 MByte
Altera(阿尔特拉)
386 页 / 2.46 MByte
Altera(阿尔特拉)
470 页 / 5.61 MByte
Altera(阿尔特拉)
6 页 / 0.08 MByte

EP1C20F324 数据手册

Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone I 2006 LABs 233 IOs
Altera(阿尔特拉)
Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone I 2006 LABs 233 IOs
Altera(阿尔特拉)
Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone I 2006 LABs 233 IOs
Altera(阿尔特拉)
可编程逻辑器件(CPLD/FPGA) EP1C20F324I7N FBGA-324
Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone I 2006 LABs 233 IOs
Altera(阿尔特拉)
Intel(英特尔)
Intel(英特尔)
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