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EP2C20F484C6
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EP2C20F484C6数据手册
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Altera Corporation Section I–1
Preliminary
Section I. Cyclone II
Device Family Data Sheet
This section provides information for board layout designers to
successfully layout their boards for Cyclone
®
II devices. It contains the
required PCB layout guidelines, device pin tables, and package
specifications.
This section includes the following chapters:
Chapter 1. Introduction
Chapter 2. Cyclone II Architecture
Chapter 3. Configuration & Testing
Chapter 4. Hot Socketing & Power-On Reset
Chapter 5. DC Characteristics and Timing Specifications
Chapter 6. Reference & Ordering Information
Revision History
Refer to each chapter for its own specific revision history. For information
on when each chapter was updated, refer to the Chapter Revision Dates
section, which appears in the complete handbook.

EP2C20F484C6 数据手册

Altera(阿尔特拉)
50 页 / 1.92 MByte
Altera(阿尔特拉)
168 页 / 0.53 MByte
Altera(阿尔特拉)
11 页 / 0.13 MByte
Altera(阿尔特拉)
470 页 / 5.61 MByte
Altera(阿尔特拉)
3 页 / 0.12 MByte

EP2C20F484 数据手册

Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone II 1172 LABs 315 IOs
Altera(阿尔特拉)
可编程逻辑器件(CPLD/FPGA) EP2C20F484I8N BGA-484
Altera(阿尔特拉)
可编程逻辑器件(CPLD/FPGA) EP2C20F484C6N BGA-484
Altera(阿尔特拉)
Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone II 1172 LABs 315 IOs
Altera(阿尔特拉)
Altera(阿尔特拉)
FPGA - 现场可编程门阵列 FPGA - Cyclone II 1172 LABs 315 IOs
Altera(阿尔特拉)
Intel(英特尔)
Intel(英特尔)
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