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PIC16F1519-I/PT 其他数据使用手册 - Microchip(微芯)
制造商:
Microchip(微芯)
分类:
8位微控制器
封装:
TQFP-44
描述:
MICROCHIP PIC16F1519-I/PT 微控制器, 8位, 闪存, AEC-Q100, PIC16F151x, 20 MHz, 28 KB, 1 KB, 44 引脚, TQFP
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PIC16F1519-I/PT数据手册
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PIC16(L)F1516/1517/1518/1519
DS80518E-page 4 2010-2012 Microchip Technology Inc.
3.3 Oscillator Start-up Timer (OST) bit
During the Two-Speed Start-up sequence, the
OST is enabled to count 1024 clock cycles. After
the count is reached, the OSTS bit is set, the
system clock is held low until the next falling edge
of the external crystal (LP, XT or HS mode), before
switching to the external clock source.
When an external oscillator is configured as the
primary clock and Fail-Safe Clock mode is enabled
(FCMEN = 1), any of the following conditions will
result in the Oscillator Start-up Timer (OST) failing
to restart:
•MCLR
Reset
• Wake from Sleep
• Clock change from INTOSC to Primary Clock
This anomaly will manifest itself as a clock failure
condition for external oscillators which take longer
than the clock failure time-out period to start.
Work around
None.
Affected Silicon Revisions
4. Module: Configuration Word
4.1 Configuration Word 1, Bit 8
If an attempt is made to clear bit 8, bit 7 will be
cleared instead. A cleared bit 7 enables code-protect
on the device.
Work around
Do not write Configuration Word 1, bit 8 to ‘0’.
Affected Silicon Revisions
5. Module: Low-Dropout (LDO) Voltage
Regulator
5.1 Low-Power Sleep mode at Ambient
Temperatures Below 0
C
Under the following conditions:
• ambient temperatures below 0
C
• while in Sleep mode
• VREGCON configured for Low-Power Sleep
mode (VREGPM = 1)
On very rare occasions, the LDO voltage will drop
below the minimum V
DD, causing unexpected
device Resets.
Work around
For applications that operate at ambient
temperatures below 0
C, use the LDO voltage
regulator in Normal-Power mode (VREGPM = 0).
Affected Silicon Revisions
A2 A3 A4 A6
XXX
A2 A3 A4 A6
XX
A2 A3 A4 A6
XXX
X
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