Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC16F1829T-I/SO 数据手册 > PIC16F1829T-I/SO 其他数据使用手册 5/12 页
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PIC16F1829T-I/SO 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
SOIC-20
描述:
PIC16 系列 1 kB RAM 14 kB 闪存 8 位 表面贴装 微控制器 - SOIC-20
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PIC16F1829T-I/SO数据手册
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2011-2014 Microchip Technology Inc. DS80000517H-page 5
PIC16(L)F1825/1829
4. Module: In-Circuit Serial Programming™
(ICSP™)
4.1 Bulk Erase Feature not available with
Low-Voltage Programming mode
A Bulk Erase of the program Flash memory or data
memory cannot be executed in Low-Voltage
Programming mode.
Work around
Method 1: If ICSP Low-Voltage Programming
mode is required, use row erases
to erase the program memory, as
described in the Program/Verify
mode section of the Programming
Specification. Data memory must
be over-written with the desired
values.
Method 2: Use ICSP High-Voltage
Programming mode if a Bulk
Erase is required.
Affected Silicon Revisions
5. Module: Clock Switching
5.1 OSTS Status Bit
When the 4xPLL is enabled, the Oscillator Start-up
Time-out Status (OSTS) bit always remains clear.
Work around
None.
Affected Silicon Revisions
6. Module: MSSP (Master Synchronous
Serial Port)
6.1 Unintentional SPI Slew Rate Reduction on
SSP2
This issue is caused when SSP2 is configured for
SPI Master mode while SSP1 is set up for I
2
C™
Slave/Master mode with the slew rate (SMP) bit
set. This limits SPI bit rates and can cause triangle
wave output which is proportional to the speed of
the clock. It is most noticeable when the SPI clock
exceeds 500 kHz. The selected mode in SSP2
does not affect this issue (CKP/CKE bits).
Work around
1. Disable slew rate control on SSP1 by clearing
the SMP bit;
2. Select the alternate pin for SSP2 output;
3. Swap the functionality of the modules;
4. Configure SSP2 with a slower SPI clock.
Affected Silicon Revisions
Note: Only the Bulk Erase feature will erase
program or data memory if code or data
protection is enabled. Method 2 must be
used if code or data protection is enabled.
A0 A2
A4
X
A0 A2 A4
XX
X
A0 A2
A4
XX
X
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