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PUSB3FR4Z 其他数据使用手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
齐纳二极管
封装:
DFN2510-10
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PUSB3FR4Z数据手册
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PUSB3FR4 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 26 January 2015 3 of 15
NXP Semiconductors
PUSB3FR4
ESD protection for ultra high-speed interfaces
6. Characteristics
[1] This parameter is guaranteed by design.
[2] According to IEC 61000-4-5 (8/20 s current waveform).
[3] 100 ns Transmission Line Pulse (TLP); 50 ; pulser at 80 ns.
Table 5. Characteristics
T
amb
=25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
BR
breakdown voltage I
I
=1mA 5.5 9 - V
I
LR
reverse leakage current per channel; V
I
=5V - <1 100 nA
V
F
forward voltage I
I
=1mA -0.7-V
C
line
line capacitance f = 1 MHz; V
I
=1.5V
[1]
- 0.29 0.34 pF
C
line
line capacitance
difference
f=1MHz; V
I
=1.5V
[1]
- 0.02 0.05 pF
r
dyn
dynamic resistance TLP
[3]
positive transient - 0.27 -
negative transient - 0.27 -
V
sbck
snapback voltage I
I
= 1 A; TLP 100/10 ns - 1.5 - V
V
CL
clamping voltage I
PP
= 5 A; positive transient
[2]
-3-V
I
PP
= 5A;
negative transient
[2]
- 3- V
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