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TMS320F2811PBKS 其他数据使用手册 - TI(德州仪器)
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TI(德州仪器)
分类:
微控制器
封装:
LQFP-128
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数字信号处理器 Digital Signal Processors
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TMS320F2811PBKS数据手册
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Usage Notes and Known Design Exceptions to Functional Specifications
5
SPRZ193Q–January 2003–Revised February 2017
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Copyright © 2003–2017, Texas Instruments Incorporated
TMS320F281x, TMS320C281x DSPs Silicon Revisions G, F, E, D, C, B, A, 0
4.2 Known Design Exceptions to Functional Specifications
Table 4. Table of Contents for Advisories
Title ...................................................................................................................................... Page
Advisory —Memory: Prefetching Beyond Valid Memory ........................................................................... 8
Advisory —Memory: Program Reads From Flash/ROM Memory ................................................................. 8
Advisory —Memory: Flash and OTP Prefetch Buffer Overflow.................................................................... 9
Advisory —Memory: Set Device Emulation Register Bits for On-Chip RAM Performance................................... 10
Advisory —Memory: OTP Memory................................................................................................... 10
Advisory —XINTF: XBANK Does Not Properly Extend an Access.............................................................. 11
Advisory —XINTF: XREADY Signal is not Sampled Properly When Using Asynchronous Sampling Mode............... 12
Advisory —SCI: Incorrect Operation of SCI in Address Bit Mode ............................................................... 13
Advisory —SCI: Bootloader Does Not Clear the ABD Bit After Auto-Baud Lock .............................................. 14
Advisory —SCI: Bootloader Does Not Clear the ABD Bit Before Auto-Baud Lock............................................ 14
Advisory —eCAN: Abort Acknowledge Bit Not Set ................................................................................ 15
Advisory —eCAN: CPU Access to the eCAN Registers may Fail if it is in Conflict With an eCAN Access to the eCAN
Registers ....................................................................................................................... 16
Advisory —eCAN: Unexpected Cessation of Transmit Operation ............................................................... 17
Advisory —WD: WDFLAG Bit Does Not Work as Intended ...................................................................... 18
Advisory —WD: A Low Output on GPIOF14 Can Disable the PLL and Watchdog if the Watchdog Fires a Reset....... 18
Advisory —ADC: EOS BUF1/2 Bits in ADCST Corrupted at the End of Conversion of Sequencer 1/2 When INT
MOD SEQ1/2 is Enabled ..................................................................................................... 19
Advisory —ADC: Reserved Bits in Autosequence Status Register (ADCASEQSR) .......................................... 19
Advisory —ADC: Sequencer Reset While Dual Sequencers Are Running..................................................... 19
Advisory —ADC: Result Register Update Delay ................................................................................... 20
Advisory —ADC: Device Has Higher Gain Error Than the Design Goal of 1% FSR on All of the B0−B7 Channels ..... 21
Advisory —ADC: Device Has Higher Offset Error Than the Design Goal (0.5 to 1%) on Some Channels ................ 21
Advisory —ADC: Device Has Higher Non-Linearity Than the Design Goal of 2 LSBs ....................................... 22
Advisory —McBSP: Receive FIFO Read Conflict.................................................................................. 23
Advisory —McBSP: Read Operations Decrement the McBSP FIFO............................................................ 23
Advisory —SPI: Slave-Mode Operation ............................................................................................. 24
Advisory —Clocking: Logic-High Level for XCLKIN Pin........................................................................... 24
Advisory —EV: QEP Circuit........................................................................................................... 25
Advisory —QEP: QEP Inputs in GPIO Asynchronous Mode..................................................................... 25
Advisory —DEVICE-ID: Register of the Silicon Same for Revision C and Revision D ....................................... 26
Advisory —PLL: PLL x4 and x8 Multiplier Ratios .................................................................................. 26
Advisory —Low-Power Modes − STANDBY Mode ................................................................................ 26
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