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OMAP3530DCUSA 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微处理器
封装:
FCBGA-423
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P6P14Hot
原理图在P5P177P178P179
封装尺寸在P259P260
标记信息在P259P260
封装信息在P4P256P257P258P259P260P261
功能描述在P196
技术参数、封装参数在P4P121P134P135P136P137P138P139P140P141P142P143
应用领域在P1P2P3P4P5P6P7P10P11P12P13P14
电气规格在P4P119P120P121P122P123P124P125P126P127P128P129
导航目录
OMAP3530DCUSA数据手册
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若手册格式错乱，请下载阅览PDF原文件
IVA 2.2Subsystem
TMS320DM64x+DSP
ImagingVideoand
AudioProcessor
32K/32KL1$
48KL1DRAM
64KL2$
32KL2RAM
16KL2ROM
VideoHardware
Accelerators
64
32
Async
64
32
64
64
Async
64
64
L2$
256K
MPU
Subsystem
ARMCortex-
A8
TM
Core
16K/16KL1$
POWERVR
SGX
Graphics
Accelerator
(3530only)
TM
32
32
32
Channel
System
DMA
3232
Parallel
TV
Amp
LCDPanel
CVBS
or
S-Video
DualOutput3-Layer
DisplayProcessor
(1xGraphics,2xVideo)
TemporalDithering
SDTV → QCIFSupport
32
Camera
ISP
Image
Capture
Hardware
Image
Pipeline
and
Preview
Camera
(Parallel)
64
HSUSB
Host
(with
USB
TTL)
HS
USB
OTG
32
L3InterconnectNetwork-Hierarchial,Performance,andPowerDriven
64K
On-Chip
RAM
2KB
Public/
62KB
Secure
32
112K
On-Chip
ROM
80KB
Secure/
32KB
BOOT
32
SMS:
SDRAM
Memory
Scheduler/
Rotation
64
SDRC:
SDRAM
Memory
Controller
L4Interconnect
32
System
Controls
PRCM
2xSmartReflex
TM
Control
Module
External
Peripherals
Interfaces
Peripherals:
3xUART,3xHigh-SpeedI2C,
5xMcBSP
(2xwithSidetone/AudioBuffer)
4xMcSPI,6xGPIO,
3xHigh-SpeedMMC/SDIO,
HDQ/1Wire,
2xMailboxes
12xGPTimers,2xWDT,
32KSyncTimer
GPMC:
General
Purpose
Memory
Controller
NAND/
NOR
Flash,
SRAM
32
Emulation
Debug:SDTI,ETM,JTAG,
Coresight
TM
DAP
Externaland
StackedMemories
32
OMAP ApplicationsProcessor
OMAP3530, OMAP3525
www.ti.com
SPRS507H –FEBRUARY 2008–REVISED OCTOBER 2013
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the OMAP3530 and OMAP3525 applications processors.
Figure 1-1. OMAP3530 and OMAP3525 Device Functional Block Diagram
Copyright © 2008–2013, Texas Instruments Incorporated OMAP3530 and OMAP3525 Applications Processors 5
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