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STM32F412RET6 产品设计参考手册 - ST Microelectronics(意法半导体)
制造商:
ST Microelectronics(意法半导体)
分类:
微控制器
封装:
LQFP-64
描述:
STM32F412RET6可运行于工作频率100 MHz、支持浮点运算单元的Cortex-M4内核,在运行和停机模式下实现出色的低功耗性能。
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STM32F412RET6数据手册
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6
32002F–03/2010
AVR32
•sscall
•retss
• Floating-point instructions as described in Section 4. on page 40.
Revision 3 of the AVR32UC CPU added the following system registers:
• SS_STATUS
• SS_ADRF, SS_ADRR, SS_ADR0, SS_ADR1
• SS_SP_SYS, SS_SP_APP
• SS_RAR, SS_RSR
Revision 3 of the AVR32UC CPU added the following bit in the status register:
•SS
AVR32UC CPU revision 2 is fully backward-compatible with revision 1, ie. code compiled for
revision 1 is binary-compatible with revision 2 CPUs.
AVR32UC CPU revision 3 is fully backward-compatible with revision 1 and 2, ie. code compiled
for revision 1 and 2 is binary-compatible with revision 3 CPUs.
The Architecture Revision field in the CONFIG0 system register identifies which architecture
revision is implemented in a specific device. The “Processor and Architecture”-chapter of the
device datasheet identifies the CPU revision used.
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