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ATMEGA128-16MU 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
VFQFN-64
描述:
8 位 megaAVR 微控制器，32KB 到 256KB 闪存我们在 RS Components 提供多款来自 Atmel 的 megaAVR 8 位微控制器。 每个微控制器均基于增强型 RISC 体系结构，并具有 QTouch 库支持。 所有微控制器类型具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型** ATmega32 ATmega64 ATmega128 ATmega324 ATmega325 ATmega406 ATmega640 ATmega644 ATmega645 ATmega1280 ATmega1281 ATmega1284 ATmega2560 ATmega2561 ATmega3250 ATmega6450
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2P5P68P93P112P146Hot
原理图在P3P10P66P93P94P96P97P113P118P119P121P123
封装尺寸在P369P370
型号编码规则在P368P374P375P376P378
封装信息在P369P376
应用领域在P34P50P61P64P273P276P284P286P287
电气规格在P90P375
导航目录
ATMEGA128-16MU数据手册
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5
2467S–AVR–07/09
ATmega128
ATmega103
Compatibility Mode
By programming the M103C fuse, the ATmega128 will be compatible with the ATmega103
regards to RAM, I/O pins and interrupt vectors as described above. However, some new fea-
tures in ATmega128 are not available in this compatibility mode, these features are listed below:
• One USART instead of two, Asynchronous mode only. Only the eight least significant bits of
the Baud Rate Register is available.
• One 16 bits Timer/Counter with two compare registers instead of two 16-bit Timer/Counters
with three compare registers.
• Two-wire serial interface is not supported.
• Port C is output only.
• Port G serves alternate functions only (not a general I/O port).
• Port F serves as digital input only in addition to analog input to the ADC.
• Boot Loader capabilities is not supported.
• It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
• The External Memory Interface can not release any Address pins for general I/O, neither
configure different wait-states to different External Memory Address sections.
In addition, there are some other minor differences to make it more compatible to ATmega103:
• Only EXTRF and PORF exists in MCUCSR.
• Timed sequence not required for Watchdog Time-out change.
• External Interrupt pins 3 - 0 serve as level interrupt only.
• USART has no FIFO buffer, so data overrun comes earlier.
Unused I/O bits in ATmega103 should be written to 0 to ensure same operation in ATmega128.
Pin Descriptions
VCC Digital supply voltage.
GND Ground.
Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega128 as listed on page
73.
Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega128 as listed on page
74.
Port C (PC7..PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
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