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CC2511F16RSPR
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CC2511F16RSPR数据手册
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SWRA124 Page 6 of 15
2.4.1 CHIP_ERASE()
Erases the entire flash memory, including lock bits.
Debug command header = 0x14.
Debug Clock
Debug Data
Data Direction
discard
2.4.2 WR_CONFIG(IN: config_8)
Writes the debug configuration byte, which contains the following bits:
0x08 - TIMERS_OFF
0x04 - DMA_PAUSE
0x02 - TIMER_SUSPEND
0x01 - SEL_FLASH_INFO_PAGE
Debug command header = 0x1D.
Debug Clock
Debug Data
Data Direction
config discard
2.4.3 READ_STATUS(OUT: status_8)
Reads the debug status byte, which contains the following bits:
0x80 - CHIP_ERASE_DONE
0x40 - PCON_IDLE
0x20 - CPU_HALTED
0x10 - POWER_MODE_0
0x08 - HALT_STATUS
0x04 - DEBUG_LOCKED
0x02 - OSCILLATOR_STABLE
0x01 - STACK_OVERFLOW
Debug command header = 0x34.
Debug Clock
Debug Data
Data Direction
status
The READ_STATUS command is used e.g. for polling the status of flash chip erase after a
CHIP_ERASE command or oscillator stable status required for debug commands HALT, RESUME,
DEBUG_INSTR, STEP_REPLACE and STEP_INSTR.

CC2511F16RSPR 数据手册

TI(德州仪器)
245 页 / 3.83 MByte
TI(德州仪器)
223 页 / 2.03 MByte
TI(德州仪器)
16 页 / 0.11 MByte
TI(德州仪器)
8 页 / 0.89 MByte

CC2511F16 数据手册

TI(德州仪器)
低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller
TI(德州仪器)
低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller
TI(德州仪器)
低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller
TI(德州仪器)
低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller
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