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6 Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
The FLEX 10K architecture is similar to that of embedded gate arrays, the
fastest-growing segment of the gate array market. As with standard gate
arrays, embedded gate arrays implement general logic in a conventional
“sea-of-gates” architecture. In addition, embedded gate arrays have
dedicated die areas for implementing large, specialized functions. By
embedding functions in silicon, embedded gate arrays provide reduced
die area and increased speed compared to standard gate arrays. However,
embedded megafunctions typically cannot be customized, limiting the
designer’s options. In contrast, FLEX 10K devices are programmable,
providing the designer with full control over embedded megafunctions
and general logic while facilitating iterative design changes during
debugging.
Each FLEX 10K device contains an embedded array and a logic array. The
embedded array is used to implement a variety of memory functions or
complex logic functions, such as digital signal processing (DSP),
microcontroller, wide-data-path manipulation, and data-transformation
functions. The logic array performs the same function as the sea-of-gates
in the gate array: it is used to implement general logic, such as counters,
adders, state machines, and multiplexers. The combination of embedded
and logic arrays provides the high performance and high density of
embedded gate arrays, enabling designers to implement an entire system
on a single device.
FLEX 10K devices are configured at system power-up with data stored in
an Altera serial configuration device or provided by a system controller.
Altera offers the EPC1, EPC2, EPC16, and EPC1441 configuration devices,
which configure FLEX 10K devices via a serial data stream. Configuration
data can also be downloaded from system RAM or from Altera’s
BitBlaster
TM
serial download cable or ByteBlasterMV
TM
parallel port
download cable. After a FLEX 10K device has been configured, it can be
reconfigured in-circuit by resetting the device and loading new data.
Because reconfiguration requires less than 320 ms, real-time changes can
be made during system operation.
FLEX 10K devices contain an optimized interface that permits
microprocessors to configure FLEX 10K devices serially or in parallel, and
synchronously or asynchronously. The interface also enables
microprocessors to treat a FLEX 10K device as memory and configure the
device by writing to a virtual memory location, making it very easy for the
designer to reconfigure the device.

EP1C20F400C8 数据手册

Altera(阿尔特拉)
385 页 / 5.45 MByte
Altera(阿尔特拉)
50 页 / 1.92 MByte
Altera(阿尔特拉)
128 页 / 1.8 MByte
Altera(阿尔特拉)
386 页 / 2.46 MByte
Altera(阿尔特拉)
470 页 / 5.61 MByte
Altera(阿尔特拉)
6 页 / 0.08 MByte

EP1C20F400 数据手册

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