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MC68HC908QT1VPE 用户编程技术手册 - NXP（恩智浦）
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MC68HC908QT1VPE数据手册
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The Routines
Using MC68HC908 On-Chip FLASH Programming Routines, Rev. 3
Freescale Semiconductor 3
3.1 GETBYTE
GETBYTE is a routine that receives a byte on the monitor mode communication port defined for that
particular device, and this received value is passed back to the calling routine in the accumulator. For these
devices, the communication port is either port A0 or port B0. Table 3 shows which communication port
(COMMPORT) is used for each device.
GETBYTE expects the same non-return-to-zero (NRZ) communication protocol and baud rate that is used
in monitor mode. The difference between this routine’s method of receiving a byte and when the monitor
receives a byte is that the monitor echoes back whatever is received. It may be more efficient for a RAM
program to use this routine when receiving data from a host to eliminate the time overhead in sending out
every byte that is received. This is especially true if the host program and RAM routine already have a
built-in error detection scheme, such as a message checksum, and there might not be a need to do an echo
check for each byte sent.
This routine detects a framing error when a STOP bit is not detected. If the carry (C) bit of the condition
code register (CCR) is cleared after returning from this routine, a framing error occurred during the data
receiving process. Therefore, the data in the accumulator is not reliable. The user software is responsible
for handing such errors.
The communication baud rate is defined by the internal operating bus frequency (f
op
) divided by a constant
value. Table 1 shows the divider value and a typical baud rate for each device.
Table 1. Communication Baud Rate
Divider
Value
Typical Baud Rate
MC68HC908EY16 256 9600bps @ f
op
=2.4576MHz
MC68HC908GR4/8(A)
256
9600bps @ f
op
=2.4576MHz
MC68HC908GT16
256
9600bps @ f
op
=2.4576MHz
MC68HC908JB8 306 9600bps @ f
op
=3MHz
MC68H(R/L)C908JL1(E)
MC68H(R/L)C908JK1(E)M
C68H(R/L)C908JK3(E)
256 9600bps @ f
op
=2.4576MHz
MC68HC908KX2/8 256 9600bps @ f
op
=2.4576MHz
MC68HC908QT1/2/4
MC68HC908QY1/2/4
256 9600bps @ f
op
=2.4576MHz
MC68HLC908QT1/2/4
MC68HLC908QY1/2/4
256 9600bps @ f
op
=2.4576MHz when
ECGST bit in OSCSTAT is set
208 4800bps @ f
op
=1MHz when ECGST bit
in OSCSTAT is cleared
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