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PIC16LF876-04I/SP
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PIC16LF876-04I/SP数据手册
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2002 Microchip Technology Inc. DS39025F-page 3
PIC16F87X
2.0 PROGRAM MODE ENTRY
2.1 User Program Memory Map
The user memory space extends from 0x0000 to
0x1FFF (8K). In Programming mode, the program
memory space extends from 0x0000 to 0x3FFF, with
the first half (0x0000-0x1FFF) being user program
memory and the second half (0x2000-0x3FFF) being
configuration memory. The PC will increment from
0x0000 to 0x1FFF and wrap to 0x0000, 0x2000 to
0x3FFF and wrap around to 0x2000 (not to 0x0000).
Once in configuration memory, the highest bit of the PC
stays a 1, thus always pointing to the configuration
memory. The only way to point to user program mem-
ory is to reset the part and re-enter Program/Verify
mode, as described in Section 2.4.
In the configuration memory space, 0x2000-0x200F
are physically implemented. However, only locations
0x2000 through 0x2007 are available. Other locations
are reserved. Locations beyond 0x200F will physically
access user memory (see Figure 2-1).
2.2 Data EEPROM Memory
The EEPROM data memory space is a separate block
of high endurance memory that the user accesses
using a special sequence of instructions. The amount
of data EEPROM memory depends on the device and
is shown below in number of bytes.
The contents of data EEPROM memory have the capa-
bility to be embedded into the HEX file.
The programmer should be able to read data EEPROM
information from a HEX file and conversely (as an
option), write data EEPROM contents to a HEX file,
along with program memory information and configura-
tion bit information.
The 256 data memory locations are logically mapped
starting at address 0x2100. The format for data mem-
ory storage is one data byte per address location, LSB
aligned.
2.3 ID Locations
A user may store identification information (ID) in four
ID locations. The ID locations are mapped in [0x2000 :
0x2003]. It is recommended that the user use only the
four Least Significant bits of each ID location. In some
devices, the ID locations read out in an unscrambled
fashion after code protection is enabled. For these
devices, it is recommended that ID location is written as
11 1111 1000 bbbb where bbbb is ID information.
In other devices, the ID locations read out normally,
even after code protection. To understand how the
devices behave, refer to Table 5-1.
To understand the scrambling mechanism after code
protection, refer to Section 4.0.
Device # of Bytes
PIC16F870 64
PIC16F871 64
PIC16F872 64
PIC16F873 128
PIC16F874 128
PIC16F876 256
PIC16F877 256

PIC16LF876-04I/SP 数据手册

Microchip(微芯)
218 页 / 2.13 MByte
Microchip(微芯)
84 页 / 1.36 MByte
Microchip(微芯)
22 页 / 0.19 MByte
Microchip(微芯)
52 页 / 0.06 MByte
Microchip(微芯)
24 页 / 0.47 MByte
Microchip(微芯)
2 页 / 0.1 MByte
Microchip(微芯)
4 页 / 0.15 MByte

PIC16LF87604 数据手册

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PIC16F873/874/876/877 8 位闪存微控制器Microchip 的 PIC16F 系列微控制器 8 位 MCU,将 Microchip 的 PIC® 体系架构融入到引脚和封装选件中,从节省空间的 14 引脚设备到功能丰富的 64 引脚设备。 带有基线、中级或增强型中级体系架构的设备提供多种不同的外围设备组合,可谓设计人员提供灵活性,并为应用提供选择。 PIC16F873/874/876/877 系列微控制器基于 Microchip 中档内核,带 8 层深硬件堆栈和 35 个指令。 这些 MCU 提供高达 5 MIPS、3.5 K 字节的程序内存,128 字节 RAM 和 64 字节的 EEPROM。### 微控制器功能最大 20 MHz CPU 速度 35 个指令 8 级硬件堆栈 22 个输入/输出引脚 – PIC16F873/876 33 个输入/输出引脚 – PIC16F874/877 通电重置 (POR) 掉电重置 (BOR) 通电计时器 (PWRT) 振荡器启动计时器 (OST) 监控计时器 (WDT) 在线串行编程 (ICSP) 在线调试 (ICD) ### 外设10 位模拟到数字转换器 (ADC) - PIC16F873/876 5 通道,PIC16F874/877 8 通道 两个捕获、比较、PWM (CCP) 模块 两个 8 位计时器 一个 16 位计时器 同步串行端口 (SSP),带有 SPI 和 I2C 通用同步异步接收器发射器 (USART) 从并行端口 (PSP) – 仅限 PIC16F874/877 型号 ### PIC16 微控制器
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PIC16 系列 368 B RAM 14 kB 闪存 8位 CMOS 微控制器 - SDIP-28
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PIC16 系列 368 B RAM 14 kB 闪存 8 位 CMOS 微控制器 - SDIP-28
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