Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC18F1330-I/P 数据手册 > PIC18F1330-I/P 用户编程技术手册 5/36 页
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PIC18F1330-I/P 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
DIP-18
描述:
MICROCHIP PIC18F1330-I/P 微控制器, 8位, 闪存, PIC18F1xxx, 40 MHz, 8 KB, 256 Byte, 18 引脚, DIP
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PIC18F1330-I/P数据手册
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若手册格式错乱，请下载阅览PDF原文件
© 2009 Microchip Technology Inc. DS39752B-page 5
PIC18F1230/1330
2.3 Memory Maps
For the PIC18F1330 device, the code memory
space extends from 00000h to 01FFFh (8 Kbytes) in
two 4-Kbyte blocks. For the PIC18F1230 device, the
code memory space extends from 00000h to 00FFFh
(4 Kbytes) in two 2-Kbyte blocks. Addresses 00000h
through 07FFh, however, define a “Boot Block” region
that is treated separately from Block 0. All of these
blocks define code protection boundaries within the
code memory space.
The size of the Boot Block in PIC18F1230/1330
devices can be configured as 256, 512 or 1K words.
This is done through the BBSIZ<1:0> bits in the
Configuration register, CONFIG4L (see Table 5-1). It is
important to note that increasing the size of the Boot
Block decreases the size of Block 0.
TABLE 2-2: IMPLEMENTATION OF CODE
MEMORY
FIGURE 2-4: MEMORY MAP AND CODE MEMORY SPACE FOR THE PIC18F1230 DEVICE
Device Code Memory Size (Bytes)
PIC18F1230 00000h-00FFFh (4K)
PIC18F1330 00000h-01FFFh (8K)
000000h
01FFFFh
3FFFFFh
Note: Sizes of memory areas are not to scale.
* Boot Block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
Code Memory
Unimplemented
Read as ‘0’
Configuration
and ID
Space
MEMORY SIZE/DEVICE
4Kbytes
(PIC18F1230)
Address
Range
Boot Block
000000h
0001FFh* or 0003FFh*
Block 0
000200h* or 000400h
0007FFh
Block 1
000800h
000FFFh
Unimplemented
Read ‘0’s
001000h
01FFFFh
200000h
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