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Datasheet 搜索 > Maxlinear(迈凌) > XRP7724EVB-DEMO-2 数据手册 > XRP7724EVB-DEMO-2 用户编程技术手册 4/19 页
XRP7724EVB-DEMO-2
252.056
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  • 引脚图在P3
  • 典型应用电路图在P4
  • 原理图在P2P9P17
  • 型号编码规则在P4
  • 功能描述在P1
XRP7724EVB-DEMO-2数据手册
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© 2014 Exar Corporation 4/19 Rev. 1.0.0
Name Pin Number Description
GH1-GH4
36,30, 25,19
Output pin of the high side gate driver. Connect directly to the gate of an external N-
channel MOSFET.
LX1-LX4
37,31, 26,20
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching
node at the junction between the two external power MOSFETs and the inductor. These
pins are also used to measure voltage drop across bottom MOSFETs in order to provide
output current information to the control engine.
BST1-BST4
35,29, 24,18
High side driver supply pin(s). Connect BST to the external capacitor as shown in the
Typical Application Circuit on page 5. The high side driver is connected between the
BST pin and LX pin and delivers the BST pin voltage to the high side FET gate each
cycle.
GPI0-GPIO1
9,10
These pins can be configured as inputs or outputs to implement custom flags, power
good signals, enable/disable controls and synchronization to an external clock.
PSIO0-PSIO2
13,14,15
Open drain, these pins can be used to control external power MOSFETs to switch loads
on and off, shedding the load for fine grained power management. They can also be
configures as standard logic outputs or inputs just as any of the GPIOs can be
configured, but as open drains require an external pull-up when configured as outputs.
SDA, SCL
11,12
SMBus/I
2
C serial interface communication pins. These pins can be configured open
drain or pseudo-TTL requiring a pull-up resistor.
VOUT1-VOUT4
5,6,7,8
Connect to the output of the corresponding power stage. The output is sampled at least
once every switching cycle
LDO5
44
Output of a 5V LDO. This is a micro power LDO that can remain active while the rest of
the IC is in the stand-by mode. This LDO is also used to power the internal Analog
Blocks.
LDO3_3
1
Output of the 3.3V standby LDO. This is a micro power LDO that can remain active
while the rest of the IC is in shutdown.
ENABLE
40
If ENABLE is pulled high or allowed to float high, the chip is powered up (logic is reset,
registers configuration loaded, etc.). The pin must be held low for the XRP7724 to be
placed into shutdown. Active channels will automatically be ramped down, if desired,
prior to the disabling of the chip.
BFB
42
Input from the 15V output created by the external boost supply. When this pin goes
below a pre-defined threshold, a pulse is created on the low side drive to charge this
output back to the original level. If not used, this pin should be connected to GND.
DGND
17
Digital ground pin. This is the logic ground connection, and should be connected to the
ground plane close to the PAD.
CPLL
3
PLL compensation capacitor
ORDERING INFORMATION
Part Number
XRP7724EVB-DEMO-2
XRP7724EVB-DEMO-2 Evaluation Board
XRP7724EVB-DEMO-2-KIT
Evaluation kit includes XRP7724EVB-DEMO-2 Evaluation Board with Power
Architect software and interface board
XRP7724EVB-DEMO-2-KITA
Evaluation kit includes XRP7724EVB-DEMO-2 Evaluation Board with Power
Architect software, interface and Arduino controller boards
XRP7725EVB-DEMO-2
XRP7725EVB-DEMO-2 Evaluation Board
XRP7725EVB-DEMO-2-KIT
Evaluation kit includes XRP7725EVB-DEMO-2 Evaluation Board with Power
Architect software and interface board
XRP7725EVB-DEMO-2-KITA
Evaluation kit includes XRP7725EVB-DEMO-2 Evaluation Board with Power
Architect software, interface and Arduino controller boards
XR77EVB-INT-1
Interface board designed for use with an Arduino controller and compatible
evaluation boards. Also has connectivity for the Exar Configuration Module (XCM)
XRP77XXEVB-XCM
Exar Configuration Module (XCM). USB to I2C interface board.

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