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MSP430F2617TZQW 其他数据使用手册 - TI（德州仪器）
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TI（德州仪器）
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微控制器
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BGA-113
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混合信号微控制器 MIXED SIGNAL MICROCONTROLLER
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标记信息在P3
应用领域在P21
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MSP430F2617TZQW数据手册
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Detailed Bug Description
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BCL15 BCS Module
Function Unpredictable LPM3 wake-up behavior if MCLK sourced by XT2
Description If the MCLK is sourced by the XT2 oscillator, when the device wakes up from LPM3 an
unpredictable glitch might appear causing the device to hang up or execute code
incorrectly.
Workaround 1. Do not use XT2 clock for MCLK when using LPM3
OR
2. Use a clock divider for MCLK.
COMP2 COMP_A Module
Function Configuring the port disable register (CAPD)
Description According to the user's guide, each bit in the CAPD register should correspond with its
associated port I/O number. For example, when "bit 0" of CAPD is set, the port disable
function of pin Px.0 is enabled; "bit 1" controls Px.1, and so on (where Px is the port that
contains the comparator inputs). However, on this device, the bits of the CAPD register
correspond with the Comparator_A input number. For example, "bit 0" of CAPD controls
the CA0 input, "bit 1" controls CA1, etc. This difference matters when the port I/O
number is not the same as the comparator input number.
If the wrong CAPD bit is set, the port I/O function for the wrong pin will be disabled. Also,
the analog signal applied to the comparator input pin being used may cause a parasitic
current to flow from Vcc to GND. See the Comparator_A+ chapter of the MSP430x2xx
Family User's Guide (SLAU144) for more information on CAPD.
Workaround None
CPU8 CPUX Module
Function Using odd values in the SP register
Description The SP can be written with odd values. In the original CPU, an odd SP value could be
combined with an odd offset (for example, mov. #value, 5(SP)). In the new CPU, the SP
can be written with an odd value, but the first time the SP is used, the LSB is forced to 0.
Workaround Do not use odd values with the SP.
CPU16 CPUX Module
Function Indexed addressing with instructions calla, mova and bra.
Description With indexed addressing mode and instructions calla, mova, and bra, it is not possible to
reach memory above 64k if the register content is < 64k.
Example: Assume R5 = FFFEh. The instruction calla 0004h(R5) will result in a 20-bit call
of address 0002h instead of 10002h.
Workaround - Use different addressing mode to reach memory above 64k.
- First use adda [index],[Rx] to calculate address in upper memory and then do a calla
[Rx]
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MSP430F2617 Device Erratasheet SLAZ187I–October 2012–Revised April 2015
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