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器件3D模型￥ 4.171
NCP4305DDR2G 其他数据使用手册 - ON Semiconductor（安森美）
制造商:
ON Semiconductor（安森美）
封装:
SOIC-8
描述:
SMPS拓扑
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
典型应用电路图在P1P2P3P35
原理图在P48
封装尺寸在P50P51P52
焊盘布局在P50P51P52
型号编码规则在P1P49P54
标记信息在P1P49P50P51P52P54
封装信息在P49
功能描述在P4P15
技术参数、封装参数在P5P49
应用领域在P1
电气规格在P6P7
型号编号列表在P5
导航目录
NCP4305DDR2G数据手册
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NCP4305
www.onsemi.com
4
PIN FUNCTION DESCRIPTION
ver. A, B, C, D ver. Q Pin Name Description
1 1 VCC Supply voltage pin
2 2 MIN_TOFF Adjust the minimum off time period by connecting resistor to ground.
3 3 MIN_TON Adjust the minimum on time period by connecting resistor to ground.
4 4 LLD This input modulates the driver clamp level and/or turns the driver off during light load
conditions.
5 − TRIG/DIS Ultrafast turn−off input that can be used to turn off the SR MOSFET in CCM applica-
tions in order to improve efficiency. Activates disable mode if pulled−up for more than
100 ms.
6 6 CS Current sense pin detects if the current flows through the SR MOSFET and/or its body
diode. Basic turn−off detection threshold is 0 mV. A resistor in series with this pin can
decrease the turn off threshold if needed.
7 7 GND Ground connection for the SR MOSFET driver and V
CC
decoupling capacitor. Ground
connection for minimum on and off time adjust resistors, LLD and trigger inputs.
GND pin should be wired directly to the SR MOSFET source terminal/soldering point
using Kelvin connection. DFN8 exposed flag should be connected to GND
8 8 DRV Driver output for the SR MOSFET
− 5 MAX_TON Adjust the maximum on time period by connecting resistor to ground.
Minimum ON time
generator
MIN_TON
CS
detection
100mA
CS
MIN_TOFF
TRIG/ DISABLE
CS_ON
CS_OFF
DRV
VCC
GND
V
CC
managment
UVLO
DRV Out
DRIVER
V
DD
V
DD
CS_RESET
LLD
Disable detection
&
V DRV clamp
modulation
V_DRV
control
ADJ
ELAPSED
EN
Minimum OFF
time generator
ADJ
RESET
ELAPSED
10 A
V
trig
Control logic
EN
DISABLE
Disable detection
DISABLE
DISABLE
TRIG
Figure 5. Internal Circuit Architecture − NCP4305A, B, C, D
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