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PIC18F458-I/PT
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PIC18F458-I/PT数据手册
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PIC18FXX8
DS80161J-page 4 © 2006 Microchip Technology Inc.
9. Module: Program Memory
A very small number of applications are
experiencing a low failure rate when using self-
write through code types of applications. The most
common of these are bootloader operations. This
failure mechanism is characterized by a few bytes
in program memory not being written as expected.
If this failure is going to occur, it will occur during a
self-write operation. If a failure is not immediately
observed, then there will be no data retention
issues. The failure does not occur when using an
external programmer through In-Circuit Serial
Programming™ (ICSP™).
This failure mechanism is dependent on the
sequence of instructions executed after self-
writes. Good power supply decoupling minimizes
this issue. It is recommended that you use a 0.1 μF
decoupling capacitor with each power pin pair. The
decoupling capacitor should be placed very close
to the power pins.
It is recommended that you perform statistically
significant testing within your application’s
operating range (i.e., temperature and voltage)
with devices from multiple lots.
Work around
1. This work around only applies to PIC18F258
and PIC18F458 devices. The program memory
is divided into discrete panels and the failure
has only been observed when a table write is
executed from the same panel it is program-
ming. The table write (self-write) within the
same memory panel (0x0000 to 0x3FFF and
0x4000 to 0x7FFF) initiates a condition that can
cause a failure. The firmware work around is to
duplicate the partial bootloader (two instantia-
tions of write functions) in two panels and
ensure that the bootloader code always
programs a different panel from where it
resides. To accomplish this, do the following:
Receive data from communication channel
(normal operation for the bootloader).
Identify address to be written.
If writing to an address within the same
memory panel that you are executing from
(0x0000 to 0x3FFF and 0x4000 to 0x7FFF),
then jump to the opposite memory panel. If
the bootloader resides between location
0x0000 to 0x3FFF, and if writing to an
address between 0x0000 to 0x3FFF, then
jump to another instantiation of the code
located between 0x4000 to 0x7FFF and
vice versa.
Always load holding latches (loading of
TABLAT and then use TBLWT*) from the
opposite panel. This will require duplicate
code in each panel to load data.
Always initiate write from the opposite
panel. This will require duplicate code in
each panel for the unlocking sequence and
setting up the write bit.
At the end of the successful write, code can
return to the primary panel to get the next
data.
2. Use a similar device from the PIC18F4580
family.
10. Module: CAN
Under specific conditions, the first five bits of a
transmitted identifier may not match the value in the
Transmit Buffer ID register, TXBxSIDH. If the CAN
peripheral detects a Start-of-Frame (SOF) in the
third bit of interframe space, and if a message to be
transmitted is pending, the first five bits of the
transmitted identifier may be corrupted.
Work around
None
Date Codes that pertain to this issue:
All engineering and production devices.

PIC18F458-I/PT 数据手册

Microchip(微芯)
402 页 / 6.56 MByte
Microchip(微芯)
36 页 / 0.24 MByte
Microchip(微芯)
8 页 / 0.19 MByte
Microchip(微芯)
32 页 / 0.67 MByte
Microchip(微芯)
3 页 / 0.15 MByte

PIC18F458 数据手册

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