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FDG6321C 产品设计参考手册 - ON Semiconductor（安森美）
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ON Semiconductor（安森美）
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SOT-363-6
描述:
双路场效应管, MOSFET, 互补N与P沟道, 25 V, 500 mA, 0.45 ohm, SC-70, 表面安装
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FDG6321C数据手册
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Application Note 9034
Power MOSFET Avalanche Guideline
Sungmo Young, Application Engineer
March, 2004
Rev. A, March 2004
1
©2004 Fairchild Semiconductor Corporation
Introduction
The Power MOSFET is a very popular switching device used in switching power supplies and
DC-DC converters. Their operation frequency is being continuously increased to reduce size
and increase power density. This causes high di/dt, intensifies the negative effect from para-
sitic inductances, and results in high voltage spike between the Power MOSFET drain and
source during device turn off. The spike is worst at power on due to empty bulk capacitors and
small inductance because the transformer primary side inductance almost reaches the level of
leakage inductance. Fortunately, the Power MOSFET is equipped to withstand a certain level
of stress, unnecessitating expensive protection circuits. This note presents an effective way to
determine the applicability of a Power MOSFET in an application. The designers can balance
between cost and reliability.
1. A Rating System: Single Pulse UIS SOA
The Fairchild Power Discrete Group has introduced a rating system that specifies the Power
MOSFET capability for single pulse Unclamped Inductive Switching (UIS).
[1]
This system
enables easy determination and/or estimation of device feasibility in any application with sim-
ple parameters : the peak current through the Power MOSFET during avalanche (I
AS
), the
junction temperature at the start of the UIS pulse (Tj), and the time the Power MOSFET
remains in avalanche (t
AV
). By plotting I
AS
and t
AV
on a graph the user can check the UIS
capability of the device. The application specific part of Fairchild UltraFET
and Power-
Trench
provide such rating chart, and a part of QFET
TM
datasheets will soon be updated.
Figure 1. UIS Waveforms
I
AS
V
DS
t
AV
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