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MCIMX287CVM4C 产品设计参考手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
封装:
MAPBGA-289
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MCIMX287CVM4C数据手册
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i.MX28 Layout and Design Guidelines, Rev. 0
Freescale Semiconductor 5
PMU and DC-DC Converter
• Place the DCDC output capacitors as close as possible to their respective DCDC output pins (less
than 5mm away): DCDC_VDDIO, DCDC_VDDA, DCDC_VDDD.
• Place the ground connections of the DCDC_BATT input capacitors as close as possible to both the
DCDC_GND pin and the ground connections of the DCDC output capacitors.
• Place the ground connections of the DCDC output capacitors as close as possible to both the
DCDC_GND pin and the ground connections of the DCDC_BATT pin input capacitors.
The drawing below shows an optimal layout for the top layer placement and routing of the DCDC
converter.
3.3 Battery Connection
• Route the positive battery terminal on the power plane layer using a minimum trace width of 30
mils (0.762mm). A thicker trace may be required for longer battery trace runs (using a plane is
best).
• Connect the negative battery terminal directly to the ground plane(s) as well as to the top and
bottom ground fill using multiple vias (3 or more).
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