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MSP430FR5739CY 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
DIE
描述:
其他系列 24MHz 16K@x8bitFRAM 1KB
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3D模型
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引脚图在P24Hot
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应用领域在P39P41P73P578
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MSP430FR5739CY数据手册
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Contents
Preface ...................................................................................................................................... 24
1 System Resets, Interrupts, and Operating Modes, System Control Module (SYS) ...................... 26
1.1 System Control Module (SYS) Introduction ............................................................................ 27
1.2 System Reset and Initialization .......................................................................................... 27
1.2.1 Device Initial Conditions After System Reset ................................................................. 29
1.3 Interrupts .................................................................................................................... 29
1.3.1 (Non)Maskable Interrupts (NMIs) ............................................................................... 30
1.3.2 SNMI Timing ...................................................................................................... 30
1.3.3 Maskable Interrupts .............................................................................................. 30
1.3.4 Interrupt Processing .............................................................................................. 31
1.3.5 Interrupt Nesting .................................................................................................. 32
1.3.6 Interrupt Vectors .................................................................................................. 32
1.3.7 SYS Interrupt Vector Generators ............................................................................... 33
1.4 Operating Modes .......................................................................................................... 35
1.4.1 Low-Power Modes and Clock Requests ...................................................................... 37
1.4.2 Entering and Exiting Low-Power Modes LPM0 Through LPM4 ............................................ 38
1.4.3 Entering and Exiting Low-Power Modes LPMx.5 ............................................................. 38
1.5 Principles for Low-Power Applications .................................................................................. 39
1.6 Connection of Unused Pins .............................................................................................. 40
1.7 Reset Pin (RST/NMI) Configuration ..................................................................................... 40
1.8 Configuring JTAG Pins ................................................................................................... 40
1.9 Vacant Memory Space .................................................................................................... 41
1.10 Boot Code .................................................................................................................. 41
1.11 Bootstrap Loader (BSL) .................................................................................................. 41
1.12 JTAG Mailbox (JMB) System ............................................................................................ 41
1.12.1 JMB Configuration ............................................................................................... 42
1.12.2 JMBOUT0 and JMBOUT1 Outgoing Mailbox ................................................................ 42
1.12.3 JMBIN0 and JMBIN1 Incoming Mailbox ...................................................................... 42
1.12.4 JMB NMI Usage ................................................................................................. 42
1.13 JTAG and SBW Lock Mechanism Using the Electronic Fuse ....................................................... 42
1.13.1 JTAG and SBW Lock Without Password ..................................................................... 43
1.13.2 JTAG and SBW Lock With Password ........................................................................ 43
1.14 Device Descriptor Table .................................................................................................. 43
1.14.1 Identifying Device Type ......................................................................................... 44
1.14.2 TLV Descriptors ................................................................................................. 45
1.14.3 Calibration Values ............................................................................................... 46
1.15 SFR Registers ............................................................................................................. 49
1.15.1 SFRIE1 Register ................................................................................................. 50
1.15.2 SFRIFG1 Register ............................................................................................... 51
1.15.3 SFRRPCR Register ............................................................................................. 53
1.16 SYS Registers ............................................................................................................. 54
1.16.1 SYSCTL Register ................................................................................................ 55
1.16.2 SYSJMBC Register ............................................................................................. 56
1.16.3 SYSJMBI0 Register ............................................................................................. 57
1.16.4 SYSJMBI1 Register ............................................................................................. 57
2
Contents SLAU272C–May 2011–Revised November 2013
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