Datasheet 搜索 > 接口芯片 > NXP（恩智浦） > PCA9500PW,112 数据手册 > PCA9500PW,112 产品设计参考手册 2/64 页
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PCA9500PW,112 产品设计参考手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
接口芯片
封装:
TSSOP-16
描述:
NXP PCA9500PW,112 芯片, 输入/输出扩展器, I2C, 8位, 16TSSOP
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PCA9500PW,112数据手册
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UM10204 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
User manual Rev. 6 — 4 April 2014 2 of 64
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors
UM10204
I
2
C-bus specification and user manual
Revision history
Rev Date Description
v.6 20140404 User manual; sixth release
Modifications: • Figure 41 “R
p(max)
as a function of bus capacitance” updated (recalculated)
• Figure 42 “R
p(min)
as a function of V
DD
” updated (recalculated)
v.5 20121009 User manual; fifth release
v.4 20120213 User manual Rev. 4
v.3 20070619 Many of today’s applications require longer buses and/or faster speeds. Fast-mode Plus was
introduced to meet this need by increasing drive strength by as much as 10× and increasing the
data rate to 1 Mbit/s while maintaining downward compatibility to Fast-mode and Standard-mode
speeds and software commands.
v2.1 2000 Version 2.1 of the I
2
C-bus specification
v2.0 1998 The I
2
C-bus has become a de facto world standard that is now implemented in over 1000 different
ICs and licensed to more than 50 companies. Many of today’s applications, however, require higher
bus speeds and lower supply voltages. This updated version of the I
2
C-bus specification meets those
requirements.
v1.0 1992 Version 1.0 of the I
2
C-bus specification
Original 1982 first release
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