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PCA9500PW,112 产品设计参考手册 - NXP（恩智浦）
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NXP（恩智浦）
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接口芯片
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TSSOP-16
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NXP PCA9500PW,112 芯片, 输入/输出扩展器, I2C, 8位, 16TSSOP
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UM10204 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
User manual Rev. 6 — 4 April 2014 3 of 64
NXP Semiconductors
UM10204
I
2
C-bus specification and user manual
1. Introduction
The I
2
C-bus is a de facto world standard that is now implemented in over 1000 different
ICs manufactured by more than 50 companies. Additionally, the versatile I
2
C-bus is used
in various control architectures such as System Management Bus (SMBus), Power
Management Bus (PMBus), Intelligent Platform Management Interface (IPMI), Display
Data Channel (DDC) and Advanced Telecom Computing Architecture (ATCA).
This document assists device and system designers to understand how the I
2
C-bus works
and implement a working application. Various operating modes are described. It contains
a comprehensive introduction to the I
2
C-bus data transfer, handshaking and bus
arbitration schemes. Detailed sections cover the timing and electrical specifications for the
I
2
C-bus in each of its operating modes.
Designers of I
2
C-compatible chips should use this document as a reference and ensure
that new devices meet all limits specified in this document. Designers of systems that
include I
2
C devices should review this document and also refer to individual component
data sheets.
2. I
2
C-bus features
In consumer electronics, telecommunications and industrial electronics, there are often
many similarities between seemingly unrelated designs. For example, nearly every
system includes:
• Some intelligent control, usually a single-chip microcontroller
• General-purpose circuits like LCD and LED drivers, remote I/O ports, RAM,
EEPROM, real-time clocks or A/D and D/A converters
• Application-oriented circuits such as digital tuning and signal processing circuits for
radio and video systems, temperature sensors, and smart cards
To exploit these similarities to the benefit of both systems designers and equipment
manufacturers, as well as to maximize hardware efficiency and circuit simplicity, Philips
Semiconductors (now NXP Semiconductors) developed a simple bidirectional 2-wire bus
for efficient inter-IC control. This bus is called the Inter IC or I
2
C-bus. All I
2
C-bus
compatible devices incorporate an on-chip interface which allows them to communicate
directly with each other via the I
2
C-bus. This design concept solves the many interfacing
problems encountered when designing digital control circuits.
Here are some of the features of the I
2
C-bus:
• Only two bus lines are required; a serial data line (SDA) and a serial clock line (SCL).
• Each device connected to the bus is software addressable by a unique address and
simple master/slave relationships exist at all times; masters can operate as
master-transmitters or as master-receivers.
• It is a true multi-master bus including collision detection and arbitration to prevent data
corruption if two or more masters simultaneously initiate data transfer.
• Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 kbit/s in
the Standard-mode, up to 400 kbit/s in the Fast-mode, up to 1 Mbit/s in Fast-mode
Plus, or up to 3.4 Mbit/s in the High-speed mode.
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