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TMS320C5535AZHHA05 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
DSP数字信号处理器
封装:
BGA-144
描述:
TMS320C5535 ， C5534 ， C5533 ， C5532定点数字信号处理器 TMS320C5535, C5534, C5533,C5532 FIXED-POINT DIGITAL SIGNAL PROCESSORS
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引脚图在P344P455Hot
典型应用电路图在P285P286
原理图在P37P38P118P138P163P190P204P205P255P256P285P310
功能描述在P52P127P137
应用领域在P558
导航目录
TMS320C5535AZHHA05数据手册
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2
SPRUH87H–August 2011–Revised April 2016
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Copyright © 2011–2016, Texas Instruments Incorporated
Contents
Contents
Preface....................................................................................................................................... 33
Revision History.......................................................................................................................... 34
1 System Control .................................................................................................................. 35
1.1 Introduction.................................................................................................................. 36
1.1.1 Block Diagram ..................................................................................................... 37
1.1.2 Device Differences................................................................................................ 39
1.1.3 CPU Core .......................................................................................................... 40
1.1.4 FFT Hardware Accelerator (TMS320C5545/35 Only) ....................................................... 40
1.1.5 Power Management............................................................................................... 42
1.1.6 Peripherals ......................................................................................................... 42
1.2 System Memory ............................................................................................................ 42
1.2.1 Program/Data Memory Map ..................................................................................... 43
1.2.2 I/O Memory Map................................................................................................... 48
1.3 Device Clocking ............................................................................................................ 49
1.3.1 Overview............................................................................................................ 49
1.3.2 Clock Domains..................................................................................................... 50
1.4 System Clock Generator .................................................................................................. 51
1.4.1 Overview............................................................................................................ 51
1.4.2 Functional Description............................................................................................ 52
1.4.3 Configuration....................................................................................................... 54
1.4.4 Clock Generator Registers....................................................................................... 58
1.5 Power Management........................................................................................................ 62
1.5.1 Overview............................................................................................................ 62
1.5.2 Power Domains.................................................................................................... 62
1.5.3 Clock Management ............................................................................................... 63
1.5.4 Static Power Management ...................................................................................... 75
1.5.5 Power Considerations ............................................................................................ 79
1.5.6 Power Configurations............................................................................................. 84
1.6 Interrupts .................................................................................................................... 88
1.6.1 IFR and IER Registers............................................................................................ 89
1.6.2 Interrupt Timing.................................................................................................... 90
1.6.3 Timer Interrupt Aggregation Flag Register (TIAFR) [1C14h] ................................................ 91
1.6.4 GPIO Interrupt Enable and Aggregation Flag Registers..................................................... 91
1.6.5 DMA Interrupt Enable and Aggregation Flag Registers...................................................... 91
1.7 System Configuration and Control ....................................................................................... 92
1.7.1 Overview............................................................................................................ 92
1.7.2 Device Identification............................................................................................... 92
1.7.3 Device Configuration.............................................................................................. 96
1.7.4 DMA Controller Configuration.................................................................................. 105
1.7.5 Peripheral Reset ................................................................................................. 109
1.7.6 USB Byte Access (Not Available for TMS320C5532) ...................................................... 110
2 FFT Implementation on the TMS320C5545/35 DSP................................................................ 112
2.1 Introduction ................................................................................................................ 113
2.2 Basics of DFT and FFT .................................................................................................. 113
2.2.1 Radix-2 Decimation in Time Equations ....................................................................... 113
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